SlideShare a Scribd company logo
1 of 24
Dan Wehnes, Loren Schwappach, Tom Thede
     EE600: Modern Solid State Devices
       Colorado Technical University
            15 September 2011




                                          1
Presentation Overview
   HAL 9000
     System Description
     Input / Output Requirements
     Performance Requirements
     Test Procedures / System Responses
   Analysis of HAL 9000 Inverters
     Critical Characteristics
     Schematic
     DC Analysis
     Frequency Analysis
     Propagation & Time Delays
     Comparison
   Conclusion
                                           2
System Description
       HAL 9000 Computer




                           3
System Description
   HAL – (H)euristically Programmed
    (AL)gorithmic Computer (Robot Hall of Fame, 2003)
   Brain of the Space Ship Discovery in 2001: A
    Space Odyssey (Robot Hall of Fame, 2003)
   Robot that Controls/Uses Mechanical,
    Sensing, and Information Systems of the
    Spaceship (Robot Hall of Fame, 2003)
   Capabilities (Robot Hall of Fame, 2003):
     Controls/Communicates with All Systems onboard
        Spaceship Discovery
       Speech Output and Speech Recognition
       Natural Language Understanding
       Lip reading
       Thinking Faster and Better than Humans
                                                        4
Primary Input / Output
Requirements
                Inputs                                Outputs
          Auditory EM Waves              Capable of Life-Like Human Speech
     (Allows Speech Recognition)
           Visual EM Waves               Visual Identification / Recognition
  (Allows Visual Recognition and Lip     of Crew / Discovery’s Systems and
               Reading)                           Exterior Objects.
                                               Uses: Red Camera Eye
  Discovery’s Interior (Environmental)       Controls all of Discovery’s
               Conditions                  Environmental and Life Support
                                                      Systems
   Discovery’s Exterior (Space-Time)         Can Control all Mechanical
              Conditions                  Systems/Vehicles that are part of
                                                    Discovery
     Discovery’s System Outputs               Controls All of Spaceship
                                          Discovery’s Functions to Include
                                             Electronics and Navigation


                                                                               5
Performance Requirements
   Ensure Mission’s Success At Any Cost
   Perform Advanced Artificial Intelligence (AI)
    Functions (Such as Decision Making and
    Emotional Awareness)
   Operate in a Variety of Environments
   Process Information at High Speeds
   Control all Interior/Exterior Spaceship Functions




                                                        6
Test Procedures / System Responses
   Set Up
     Scenario-Based Testing at System Level – Mission
      Success Defined
     Component Level
      ○ Power and Grounding Requirements, Electro-Static
        Discharge (ESD) Protection
      ○ Lab Environment with Extreme Temperatures (space)
      ○ Durability – Shake, Rattle and Roll (Launch Simulation)

   Action
     System Level – Reaction to Anomalous Situations
      (asteroid belt)
     Component Level - Switch Control Signals and
      Evaluate


                                                                  7
Test Procedures / System Responses
   Reaction
     System Level - Response to All Inputs from Spacecraft & Humans
     Component Level - Correct Outputs Based on Inputs
   Pass/Fail Criteria
     System – Supportive of Humans and Their Directions
     Clock Speed Measurements – Response Times to Inputs
     Operating Region Evaluation – Controlled/Non-Controlled
        Environment
       Environmental Testing – Entire Range of Launch and Space
        Environment
       Failure Modes and Effects – Triple Redundancy for Human Space
        Flight
       Power Usage Evaluation – Total vs. Allocated per Component
       Use of Allocated Space and Weight on Discovery Spacecraft



                                                                        8
9
Inverter Selection – Critical
Characteristics
Critical Factors (Importance From Greatest to
Least):
 Performance:
     Clock Speed –Fast Switching Speeds (GHz / THz)
     Noise Immunity-NM
     Minimum Power Usage
   Reliability:
     Resistance to Electrostatic Discharge (Ionization effects)
     Minimal Repair Capability and Human Space Flight
      Rated – NASA and AFIT Certified
   Robustness:
     Maximum Durability



                                                                   10
Schematic
  0                           0                                        0



      Vdd1                        Vdd2                                     Vdd3
      5Vdc                        5Vdc                                     5Vdc
          CMOS Circuit                     BiCMOS Circuit                         TTL Circuit

                                                                           R1         R2         R4
      PMOS                        PMOS2                                    4k         1.6k       130
      MbreakpPMOS                 MbreakpPMOS
      W = 14u                     W = 14u
      L = 1u                      L = 1u

                                                Q1                                              Q5
                                                Q2N3904                                         Q2N3904
             CMOS_Out


                                                  BiCMOS_Out                         Q4
                                                                                     Q2N3904     D1
                                                                      Q3
                                                                                                 D1N4002
      NMOS              C1        NMOS2                               Q2N3904
      MbreaknNMOS       90p       MbreaknNMOS                   C2                                TTL_Out
      W = 24u                     W = 24u                       90p
      L = 1u                      L = 1u                                                                    C3
                                                Q2                                              Q6          90p
                                                Q2N3904                                         Q2N3904

                                                                                      R3
                                                                                      1k




      0

                                                   Vin Shared
                                           0Vdc        Input
                                                       Source




                                                                                                                  11
DC Analysis – Output Slope
                                   Using
                                 Slope =-1
                                   Points

                                   CMOS
                             Vin(low) = 1.364 V
                             Vin(high) = 2.078 V

                                  BiCMOS
                             Vin(low) = 1.922 V
                             Vin(high) = 2.494 V


                                     TTL
                             Vin(low) = 606 mV
                             Vin(high) = 1.437 V




                                           12
DC Analysis – Threshold Voltage
                                 Using
                             Slope =1 (line)


                                  CMOS
                            VThreshold = 1.854 V



                                 BiCMOS
                            VThreshold = 2.316 V




                                    TTL
                            VThreshold = 1.393 V




                                           13
DC Analysis – Noise Margins
                              Noise Margins
                                 Results


                                 CMOS
                              NMH = 2.759 V
                              NML = 1.018 V

                                BiCMOS
                              NMH = 1.734 V
                              NML = 990 mV


                                   TTL
                              NMH = 3.305 V
                              NML = 583 mV




                                         14
DC Analysis – Power Used
                                Power Used
                                  Results

                                  CMOS
                             At Vin=0V: 25 pW
                             At Vin=5V: 25 pW
                           At Vin=1.88V: 216 uW

                                 BiCMOS
                            At Vin=0V: 453 pW
                            At Vin=5V: 453 pW
                           At Vin=2.34V: 17.5 mW

                                    TTL
                            At Vin=0V: 5.38 mW
                            At Vin=5V: 16.8 mW
                           At Vin=1.43V: 165 mW




                                             15
Frequency Analysis

                     Corner Frequency
                       Results (f3dB)

                          CMOS
                         6.09 kHz

                         BiCMOS
                        68.55 kHz

                           TTL
                         5.86 MHz




                                        16
Propagation & Time Delays
                                     CMOS

                             Propagation Delays
                             tPLH = t3-t1 = 1.232 us
                              tPHL = t7-t5 = 230 ns
                            tP = tPLH + tPHL = 1.462 us

                               Rise & Fall Times
                              tR = t4-t2 = 2.869 us
                               tF = t8-t6 = 565 ns

                               Max Frequency
                              Fmax = 1/(TR+TF) =
                                 291.2 kHz




                                                 17
Propagation & Time Delays
                                  BiCMOS

                            Propagation Delays
                             tPLH = t3-t1 = 74 ns
                             tPHL = t7-t5 = 23 ns
                            tP = tPLH + tPHL = 97 ns

                              Rise & Fall Times
                             tR = t4-t2 = 212 ns
                              tF = t8-t6 = 46 ns

                              Max Frequency
                            Fmax = 1/(TR+TF) =
                               3.876 MHz




                                               18
Propagation & Time Delays
                                      TTL

                            Propagation Delays
                             tPLH = t3-t1 = 268 ns
                              tPHL = t7-t5 = 3 ns
                             tP = tPLH + tPHL = 271

                              Rise & Fall Times
                              tR = t4-t2 = 35 ns
                               tF = t8-t6 = 5 ns

                              Max Frequency
                            Fmax = 1/(TR+TF) = 25
                                   MHz




                                               19
Comparison of CMOS, BiCMOS, TTL
     Evaluation                        Ideal   CMOS BiCMOS        Lab 2d
                     Parameter
     Procedure                       Inverter Inverter Inverter    TTL
      Transfer
                       VThreshold     2.5 V   1.854 V   2.316 V   1.393 V
    Characteristic
                        NMH           2.5 V   2.759 V 1.734 V 3.305 V
    Noise Margins
                         NML          2.5 V   1.018 V 990 mV 582 mV
                     P @ Vin = 0 V     0W      25 pW 453 pW 5.38 mW
     Power Used      P @ Vin = 5 V     0W      25 pW 453 pW 16.8 mW
                         PMax          0W     216 uW 17.5 mW 165 mW
                         tPDHL         0s      230 ns  23 ns    3 ns
     Propagation
                         tPDLH         0s     1.232 us 74 ns  268 ns
       Delays
                           tP          0s     1.462 us 97 ns  271 ns
      Rise Time            tR          0s     2.869 us 212 ns  35 ns
      Fall Time            tF          0s      565 ns  46 ns    5 ns
     3dB Corner
                         f3dB          inf.   6.09 kHz 68.6 kHz 5.86 MHz
     Frequency
    Max Frequency        fMax          inf.   291 kHz 3.88 MHz    25 MHz



                                                                            20
Conclusions
Analysis Results:
 Performance:
     Clock Speed –Fast Switching Speeds (GHz / THz)
      ○ WINNER: TTL
     Noise Immunity
      ○ WINNER: CMOS
     Minimum Power Usage
      ○ WINNER: CMOS

   Reliability:
     Resistance to Electrostatic Discharge (Ionization effects)
      ○ WINNER: TTL

   Robustness:
     Maximum Durability
      ○ WINNER: TTL


Our Conclusion: Although TTL Won the Majority of Critical
Requirements We Will Need to Analyze Additional Technologies
Before Making a Final Decision
                                                                   21
Questions




            22
References
Neamen, D. (2007). Microelectronics: Circuit Analysis and Design (3rd ed.). New
   York, NY: McGraw-Hill.

Robot Hall of Fame. (2003). 2003 Inductees: HAL 9000. Retrieved September 15, 2011
   from: http://www.robothalloffame.org/hal.html

2001 Space Sounds. (2003). 2001 A Space Odyssey Internet Resource Archive.
    Retrieved September 15, 2011 from: http://www.palantir.net/2001/sounds.html

Movie Sounds. (2003). 2001: A Space Odyssey. Retrieved September 15, 2011 from:
   http://www.moviesounds.com/2001.html

[Illustration of a HAL 9000]. (n.d.). Retrieved September 15, 2011, from:
       http://bugtraq.ru/library/underground/.keep/compscifi.hal9000.jpg

[Picture of Dave, 2001 A Space Odyssey]. (n.d.). Retrieved September 15, 2011,
     from:
     http://www.google.com/imgres?q=2001+a+space+odyssey&hl=en&biw=1020&
     bih=891&tbs=isz:l&tbm=isch&tbnid=aV_lO0M1jkRAFM:&imgrefurl=http://proverbs
     ofhell.tumblr.com/post/1982878211/inspcollection-2001-a-space-odyssey-
     dave&docid=Rh2O6pBSIEt57M&w=1920&h=1080&ei=CVtyTvenD7KmsQLrtITfCQ
     &zoom=1                                                                         23
References
[Illustration of a Pilot at Console of Discovery Spaceship]. (n.d.). Retrieved
       September 15, 2011, from:
       http://4.bp.blogspot.com/_7J_WGI7Jygw/S45l1Tq6wPI/AAAAAAAAEtk/gddgrGL
       NXKw/s1600/2001%2BA%2BSpace%2BOdyssey%2BPic%2B046.jpg

[Illustration of a Man in Discovery Spaceship’s HAL Memory Array]. (n.d.). Retrieved
       September 15, 2011, from: http://wodumedia.com/wp-content/uploads/HAL-
       9000-is-about-to-get-his-hard-drive-fried-by-a-seriously-pissed-off-Dave.jpg




                                                                                       24

More Related Content

What's hot

SPICE MODEL of LM319AH in SPICE PARK
SPICE MODEL of LM319AH in SPICE PARKSPICE MODEL of LM319AH in SPICE PARK
SPICE MODEL of LM319AH in SPICE PARKTsuyoshi Horigome
 
Embedded System Microcontroller Interactive Course using BASCOM-AVR -Lecture7
Embedded System Microcontroller Interactive Course using BASCOM-AVR -Lecture7Embedded System Microcontroller Interactive Course using BASCOM-AVR -Lecture7
Embedded System Microcontroller Interactive Course using BASCOM-AVR -Lecture7AL-AWAIL for Electronic Engineering
 
Embedded System Microcontroller Interactive Course using BASCOM-AVR - Lecture...
Embedded System Microcontroller Interactive Course using BASCOM-AVR - Lecture...Embedded System Microcontroller Interactive Course using BASCOM-AVR - Lecture...
Embedded System Microcontroller Interactive Course using BASCOM-AVR - Lecture...AL-AWAIL for Electronic Engineering
 
Embedded System Microcontroller Interactive Course using BASCOM-AVR - Lecture10
Embedded System Microcontroller Interactive Course using BASCOM-AVR - Lecture10Embedded System Microcontroller Interactive Course using BASCOM-AVR - Lecture10
Embedded System Microcontroller Interactive Course using BASCOM-AVR - Lecture10AL-AWAIL for Electronic Engineering
 
SPICE MODEL of TPCF8302 (Standard+BDS Model) in SPICE PARK
SPICE MODEL of TPCF8302 (Standard+BDS Model) in SPICE PARKSPICE MODEL of TPCF8302 (Standard+BDS Model) in SPICE PARK
SPICE MODEL of TPCF8302 (Standard+BDS Model) in SPICE PARKTsuyoshi Horigome
 
W-BAND RADIOMETER SYSTEM WITH SWITCHING FRONT-END FOR MULTI-LOAD CALIBRATION.pdf
W-BAND RADIOMETER SYSTEM WITH SWITCHING FRONT-END FOR MULTI-LOAD CALIBRATION.pdfW-BAND RADIOMETER SYSTEM WITH SWITCHING FRONT-END FOR MULTI-LOAD CALIBRATION.pdf
W-BAND RADIOMETER SYSTEM WITH SWITCHING FRONT-END FOR MULTI-LOAD CALIBRATION.pdfgrssieee
 
ZVxPlus Presentation: Pulsed DC & RF Characterization
ZVxPlus Presentation: Pulsed DC & RF CharacterizationZVxPlus Presentation: Pulsed DC & RF Characterization
ZVxPlus Presentation: Pulsed DC & RF CharacterizationNMDG NV
 
SPICE MODEL of NJM78LR05 in SPICE PARK
SPICE MODEL of NJM78LR05 in SPICE PARKSPICE MODEL of NJM78LR05 in SPICE PARK
SPICE MODEL of NJM78LR05 in SPICE PARKTsuyoshi Horigome
 
Embedded System Microcontroller Interactive Course using BASCOM-AVR - Lecture6
Embedded System Microcontroller Interactive Course using BASCOM-AVR - Lecture6Embedded System Microcontroller Interactive Course using BASCOM-AVR - Lecture6
Embedded System Microcontroller Interactive Course using BASCOM-AVR - Lecture6AL-AWAIL for Electronic Engineering
 
WWT Magnetic Flow Meter, EMI Signal Analysis
WWT Magnetic Flow Meter, EMI Signal AnalysisWWT Magnetic Flow Meter, EMI Signal Analysis
WWT Magnetic Flow Meter, EMI Signal AnalysisRaden Armanadi
 
SPICE MODEL of 2SA1020(Y) in SPICE PARK
SPICE MODEL of 2SA1020(Y) in SPICE PARKSPICE MODEL of 2SA1020(Y) in SPICE PARK
SPICE MODEL of 2SA1020(Y) in SPICE PARKTsuyoshi Horigome
 
SPICE MODEL of KGH15N120NDA (Professional+FWDS Model) in SPICE PARK
SPICE MODEL of KGH15N120NDA (Professional+FWDS Model) in SPICE PARKSPICE MODEL of KGH15N120NDA (Professional+FWDS Model) in SPICE PARK
SPICE MODEL of KGH15N120NDA (Professional+FWDS Model) in SPICE PARKTsuyoshi Horigome
 
SPICE MODEL of TPCP8402 (Professional+BDP Model) in SPICE PARK
SPICE MODEL of TPCP8402 (Professional+BDP Model) in SPICE PARKSPICE MODEL of TPCP8402 (Professional+BDP Model) in SPICE PARK
SPICE MODEL of TPCP8402 (Professional+BDP Model) in SPICE PARKTsuyoshi Horigome
 
Programming And Controlling Puma Arms
Programming And Controlling Puma ArmsProgramming And Controlling Puma Arms
Programming And Controlling Puma Arms블로그코디
 
Assessment of interest points detection algorithms in OTB
Assessment of interest points detection algorithms in OTBAssessment of interest points detection algorithms in OTB
Assessment of interest points detection algorithms in OTBmelaneum
 

What's hot (20)

SPICE MODEL of LM319AH in SPICE PARK
SPICE MODEL of LM319AH in SPICE PARKSPICE MODEL of LM319AH in SPICE PARK
SPICE MODEL of LM319AH in SPICE PARK
 
Milev studnicka
Milev studnickaMilev studnicka
Milev studnicka
 
Embedded System Microcontroller Interactive Course using BASCOM-AVR -Lecture7
Embedded System Microcontroller Interactive Course using BASCOM-AVR -Lecture7Embedded System Microcontroller Interactive Course using BASCOM-AVR -Lecture7
Embedded System Microcontroller Interactive Course using BASCOM-AVR -Lecture7
 
Embedded System Microcontroller Interactive Course using BASCOM-AVR - Lecture...
Embedded System Microcontroller Interactive Course using BASCOM-AVR - Lecture...Embedded System Microcontroller Interactive Course using BASCOM-AVR - Lecture...
Embedded System Microcontroller Interactive Course using BASCOM-AVR - Lecture...
 
LG Catalogo seguridad 2011
LG Catalogo seguridad 2011LG Catalogo seguridad 2011
LG Catalogo seguridad 2011
 
Inc232 54261511
Inc232 54261511Inc232 54261511
Inc232 54261511
 
Embedded System Microcontroller Interactive Course using BASCOM-AVR - Lecture10
Embedded System Microcontroller Interactive Course using BASCOM-AVR - Lecture10Embedded System Microcontroller Interactive Course using BASCOM-AVR - Lecture10
Embedded System Microcontroller Interactive Course using BASCOM-AVR - Lecture10
 
SPICE MODEL of TPCF8302 (Standard+BDS Model) in SPICE PARK
SPICE MODEL of TPCF8302 (Standard+BDS Model) in SPICE PARKSPICE MODEL of TPCF8302 (Standard+BDS Model) in SPICE PARK
SPICE MODEL of TPCF8302 (Standard+BDS Model) in SPICE PARK
 
W-BAND RADIOMETER SYSTEM WITH SWITCHING FRONT-END FOR MULTI-LOAD CALIBRATION.pdf
W-BAND RADIOMETER SYSTEM WITH SWITCHING FRONT-END FOR MULTI-LOAD CALIBRATION.pdfW-BAND RADIOMETER SYSTEM WITH SWITCHING FRONT-END FOR MULTI-LOAD CALIBRATION.pdf
W-BAND RADIOMETER SYSTEM WITH SWITCHING FRONT-END FOR MULTI-LOAD CALIBRATION.pdf
 
Datasheet of TB62206FG
Datasheet of TB62206FGDatasheet of TB62206FG
Datasheet of TB62206FG
 
ZVxPlus Presentation: Pulsed DC & RF Characterization
ZVxPlus Presentation: Pulsed DC & RF CharacterizationZVxPlus Presentation: Pulsed DC & RF Characterization
ZVxPlus Presentation: Pulsed DC & RF Characterization
 
SPICE MODEL of NJM78LR05 in SPICE PARK
SPICE MODEL of NJM78LR05 in SPICE PARKSPICE MODEL of NJM78LR05 in SPICE PARK
SPICE MODEL of NJM78LR05 in SPICE PARK
 
74 f08
74 f0874 f08
74 f08
 
Embedded System Microcontroller Interactive Course using BASCOM-AVR - Lecture6
Embedded System Microcontroller Interactive Course using BASCOM-AVR - Lecture6Embedded System Microcontroller Interactive Course using BASCOM-AVR - Lecture6
Embedded System Microcontroller Interactive Course using BASCOM-AVR - Lecture6
 
WWT Magnetic Flow Meter, EMI Signal Analysis
WWT Magnetic Flow Meter, EMI Signal AnalysisWWT Magnetic Flow Meter, EMI Signal Analysis
WWT Magnetic Flow Meter, EMI Signal Analysis
 
SPICE MODEL of 2SA1020(Y) in SPICE PARK
SPICE MODEL of 2SA1020(Y) in SPICE PARKSPICE MODEL of 2SA1020(Y) in SPICE PARK
SPICE MODEL of 2SA1020(Y) in SPICE PARK
 
SPICE MODEL of KGH15N120NDA (Professional+FWDS Model) in SPICE PARK
SPICE MODEL of KGH15N120NDA (Professional+FWDS Model) in SPICE PARKSPICE MODEL of KGH15N120NDA (Professional+FWDS Model) in SPICE PARK
SPICE MODEL of KGH15N120NDA (Professional+FWDS Model) in SPICE PARK
 
SPICE MODEL of TPCP8402 (Professional+BDP Model) in SPICE PARK
SPICE MODEL of TPCP8402 (Professional+BDP Model) in SPICE PARKSPICE MODEL of TPCP8402 (Professional+BDP Model) in SPICE PARK
SPICE MODEL of TPCP8402 (Professional+BDP Model) in SPICE PARK
 
Programming And Controlling Puma Arms
Programming And Controlling Puma ArmsProgramming And Controlling Puma Arms
Programming And Controlling Puma Arms
 
Assessment of interest points detection algorithms in OTB
Assessment of interest points detection algorithms in OTBAssessment of interest points detection algorithms in OTB
Assessment of interest points detection algorithms in OTB
 

Similar to Ee600 lab3 hal9000_grp

Bilal 010205 1
Bilal 010205 1Bilal 010205 1
Bilal 010205 1Oraya Rat
 
MICROPROCESSOR BASED SUN TRACKING SOLAR PANEL SYSTEM TO MAXIMIZE ENERGY GENER...
MICROPROCESSOR BASED SUN TRACKING SOLAR PANEL SYSTEM TO MAXIMIZE ENERGY GENER...MICROPROCESSOR BASED SUN TRACKING SOLAR PANEL SYSTEM TO MAXIMIZE ENERGY GENER...
MICROPROCESSOR BASED SUN TRACKING SOLAR PANEL SYSTEM TO MAXIMIZE ENERGY GENER...moiz89
 
CMOS Analog IC design by Dr GS Javed - Refresher Course - Batch 1
CMOS Analog IC design by Dr GS Javed - Refresher Course - Batch 1CMOS Analog IC design by Dr GS Javed - Refresher Course - Batch 1
CMOS Analog IC design by Dr GS Javed - Refresher Course - Batch 1Javed G S, PhD
 
Basics Of Embedded Systems
Basics Of Embedded SystemsBasics Of Embedded Systems
Basics Of Embedded Systemsarlabstech
 
Tools using for Repair Electronic devices.pptx.
Tools using for Repair Electronic devices.pptx.Tools using for Repair Electronic devices.pptx.
Tools using for Repair Electronic devices.pptx.Fasial Ghazanfar
 
8051microcontroller
8051microcontroller 8051microcontroller
8051microcontroller manish080
 
4 ee414 - adv electroncs - lab 3 - loren schwappach
4   ee414 - adv electroncs - lab 3 - loren schwappach4   ee414 - adv electroncs - lab 3 - loren schwappach
4 ee414 - adv electroncs - lab 3 - loren schwappachLoren Schwappach
 
How to design a Passive Infrared (PIR) Open Source Project
How to design a Passive Infrared (PIR) Open Source ProjectHow to design a Passive Infrared (PIR) Open Source Project
How to design a Passive Infrared (PIR) Open Source ProjectIonela
 
C:\Documents And Settings\Fredlin\Desktop\Ic Design\Synthesis200301
C:\Documents And Settings\Fredlin\Desktop\Ic Design\Synthesis200301C:\Documents And Settings\Fredlin\Desktop\Ic Design\Synthesis200301
C:\Documents And Settings\Fredlin\Desktop\Ic Design\Synthesis200301guest77988fe
 
Analog, IO Test Chip Validation
Analog,  IO Test Chip  ValidationAnalog,  IO Test Chip  Validation
Analog, IO Test Chip ValidationSMIT A. PATEL
 
PROGRAMMABLE LOGIC CONTROLLERS
PROGRAMMABLELOGIC CONTROLLERSPROGRAMMABLELOGIC CONTROLLERS
PROGRAMMABLE LOGIC CONTROLLERSDnr Creatives
 
PPT FINAL (1)-1 (1).ppt
PPT FINAL (1)-1 (1).pptPPT FINAL (1)-1 (1).ppt
PPT FINAL (1)-1 (1).ppttariqqureshi33
 
line following robot
line following robotline following robot
line following robotRehnaz Razvi
 

Similar to Ee600 lab3 hal9000_grp (20)

Bilal 010205 1
Bilal 010205 1Bilal 010205 1
Bilal 010205 1
 
MICROPROCESSOR BASED SUN TRACKING SOLAR PANEL SYSTEM TO MAXIMIZE ENERGY GENER...
MICROPROCESSOR BASED SUN TRACKING SOLAR PANEL SYSTEM TO MAXIMIZE ENERGY GENER...MICROPROCESSOR BASED SUN TRACKING SOLAR PANEL SYSTEM TO MAXIMIZE ENERGY GENER...
MICROPROCESSOR BASED SUN TRACKING SOLAR PANEL SYSTEM TO MAXIMIZE ENERGY GENER...
 
R2 R
R2 RR2 R
R2 R
 
CMOS Analog IC design by Dr GS Javed - Refresher Course - Batch 1
CMOS Analog IC design by Dr GS Javed - Refresher Course - Batch 1CMOS Analog IC design by Dr GS Javed - Refresher Course - Batch 1
CMOS Analog IC design by Dr GS Javed - Refresher Course - Batch 1
 
Basics Of Embedded Systems
Basics Of Embedded SystemsBasics Of Embedded Systems
Basics Of Embedded Systems
 
ROBOTICS - Introduction to Robotics Microcontroller
ROBOTICS -  Introduction to Robotics MicrocontrollerROBOTICS -  Introduction to Robotics Microcontroller
ROBOTICS - Introduction to Robotics Microcontroller
 
Tools using for Repair Electronic devices.pptx.
Tools using for Repair Electronic devices.pptx.Tools using for Repair Electronic devices.pptx.
Tools using for Repair Electronic devices.pptx.
 
8051microcontroller
8051microcontroller 8051microcontroller
8051microcontroller
 
4 ee414 - adv electroncs - lab 3 - loren schwappach
4   ee414 - adv electroncs - lab 3 - loren schwappach4   ee414 - adv electroncs - lab 3 - loren schwappach
4 ee414 - adv electroncs - lab 3 - loren schwappach
 
How to design a Passive Infrared (PIR) Open Source Project
How to design a Passive Infrared (PIR) Open Source ProjectHow to design a Passive Infrared (PIR) Open Source Project
How to design a Passive Infrared (PIR) Open Source Project
 
G0514551
G0514551G0514551
G0514551
 
C:\Documents And Settings\Fredlin\Desktop\Ic Design\Synthesis200301
C:\Documents And Settings\Fredlin\Desktop\Ic Design\Synthesis200301C:\Documents And Settings\Fredlin\Desktop\Ic Design\Synthesis200301
C:\Documents And Settings\Fredlin\Desktop\Ic Design\Synthesis200301
 
Analog, IO Test Chip Validation
Analog,  IO Test Chip  ValidationAnalog,  IO Test Chip  Validation
Analog, IO Test Chip Validation
 
Abhi monal
Abhi monalAbhi monal
Abhi monal
 
PROGRAMMABLE LOGIC CONTROLLERS
PROGRAMMABLELOGIC CONTROLLERSPROGRAMMABLELOGIC CONTROLLERS
PROGRAMMABLE LOGIC CONTROLLERS
 
PPT FINAL (1)-1 (1).ppt
PPT FINAL (1)-1 (1).pptPPT FINAL (1)-1 (1).ppt
PPT FINAL (1)-1 (1).ppt
 
line following robot
line following robotline following robot
line following robot
 
Microprocessors 1-8086
Microprocessors 1-8086Microprocessors 1-8086
Microprocessors 1-8086
 
ie450pp10.ppt
ie450pp10.pptie450pp10.ppt
ie450pp10.ppt
 
plc1.ppt
plc1.pptplc1.ppt
plc1.ppt
 

More from Loren Schwappach

EE312 Embedded Microcontrollers Lab
EE312 Embedded Microcontrollers LabEE312 Embedded Microcontrollers Lab
EE312 Embedded Microcontrollers LabLoren Schwappach
 
Ee325 cmos design lab 7 report - loren k schwappach
Ee325 cmos design   lab 7 report - loren k schwappachEe325 cmos design   lab 7 report - loren k schwappach
Ee325 cmos design lab 7 report - loren k schwappachLoren Schwappach
 
Ee325 cmos design lab 6 report - loren k schwappach
Ee325 cmos design   lab 6 report - loren k schwappachEe325 cmos design   lab 6 report - loren k schwappach
Ee325 cmos design lab 6 report - loren k schwappachLoren Schwappach
 
Ee325 cmos design lab 5 report - loren k schwappach
Ee325 cmos design   lab 5 report - loren k schwappachEe325 cmos design   lab 5 report - loren k schwappach
Ee325 cmos design lab 5 report - loren k schwappachLoren Schwappach
 
Ee325 cmos design lab 4 report - loren k schwappach
Ee325 cmos design   lab 4 report - loren k schwappachEe325 cmos design   lab 4 report - loren k schwappach
Ee325 cmos design lab 4 report - loren k schwappachLoren Schwappach
 
Ee325 cmos design lab 3 report - loren k schwappach
Ee325 cmos design   lab 3 report - loren k schwappachEe325 cmos design   lab 3 report - loren k schwappach
Ee325 cmos design lab 3 report - loren k schwappachLoren Schwappach
 
Loren k. schwappach ee331 - lab 4
Loren k. schwappach   ee331 - lab 4Loren k. schwappach   ee331 - lab 4
Loren k. schwappach ee331 - lab 4Loren Schwappach
 
Loren k. schwappach ee331 - lab 3
Loren k. schwappach   ee331 - lab 3Loren k. schwappach   ee331 - lab 3
Loren k. schwappach ee331 - lab 3Loren Schwappach
 
Ee343 signals and systems - lab 2 - loren schwappach
Ee343   signals and systems - lab 2 - loren schwappachEe343   signals and systems - lab 2 - loren schwappach
Ee343 signals and systems - lab 2 - loren schwappachLoren Schwappach
 
Ee343 signals and systems - lab 1 - loren schwappach
Ee343   signals and systems - lab 1 - loren schwappachEe343   signals and systems - lab 1 - loren schwappach
Ee343 signals and systems - lab 1 - loren schwappachLoren Schwappach
 
Ee 352 lab 1 (tutorial) - schwappach - 15 oct 09
Ee 352   lab 1 (tutorial) - schwappach - 15 oct 09Ee 352   lab 1 (tutorial) - schwappach - 15 oct 09
Ee 352 lab 1 (tutorial) - schwappach - 15 oct 09Loren Schwappach
 
EE375 Electronics 1: lab 3
EE375   Electronics 1: lab 3EE375   Electronics 1: lab 3
EE375 Electronics 1: lab 3Loren Schwappach
 
EE375 Electronics 1: lab 1
EE375   Electronics 1: lab 1EE375   Electronics 1: lab 1
EE375 Electronics 1: lab 1Loren Schwappach
 
Ee395 lab 2 - loren - victor - taylor
Ee395   lab 2 - loren - victor - taylorEe395   lab 2 - loren - victor - taylor
Ee395 lab 2 - loren - victor - taylorLoren Schwappach
 
Ee395 lab 1 - bjt - loren - victor - taylor
Ee395   lab 1 - bjt - loren - victor - taylorEe395   lab 1 - bjt - loren - victor - taylor
Ee395 lab 1 - bjt - loren - victor - taylorLoren Schwappach
 
5 ee415 - adv electronics - presentation - schwappach
5   ee415 - adv electronics - presentation - schwappach5   ee415 - adv electronics - presentation - schwappach
5 ee415 - adv electronics - presentation - schwappachLoren Schwappach
 
3 ee414 - adv electroncs - lab 2 - loren schwappach
3   ee414 - adv electroncs - lab 2 - loren schwappach3   ee414 - adv electroncs - lab 2 - loren schwappach
3 ee414 - adv electroncs - lab 2 - loren schwappachLoren Schwappach
 
2 ee414 - adv electroncs - lab 1 - loren schwappach
2   ee414 - adv electroncs - lab 1 - loren schwappach2   ee414 - adv electroncs - lab 1 - loren schwappach
2 ee414 - adv electroncs - lab 1 - loren schwappachLoren Schwappach
 
Ee443 phase locked loop - presentation - schwappach and brandy
Ee443   phase locked loop - presentation - schwappach and brandyEe443   phase locked loop - presentation - schwappach and brandy
Ee443 phase locked loop - presentation - schwappach and brandyLoren Schwappach
 

More from Loren Schwappach (20)

Ubuntu OS Presentation
Ubuntu OS PresentationUbuntu OS Presentation
Ubuntu OS Presentation
 
EE312 Embedded Microcontrollers Lab
EE312 Embedded Microcontrollers LabEE312 Embedded Microcontrollers Lab
EE312 Embedded Microcontrollers Lab
 
Ee325 cmos design lab 7 report - loren k schwappach
Ee325 cmos design   lab 7 report - loren k schwappachEe325 cmos design   lab 7 report - loren k schwappach
Ee325 cmos design lab 7 report - loren k schwappach
 
Ee325 cmos design lab 6 report - loren k schwappach
Ee325 cmos design   lab 6 report - loren k schwappachEe325 cmos design   lab 6 report - loren k schwappach
Ee325 cmos design lab 6 report - loren k schwappach
 
Ee325 cmos design lab 5 report - loren k schwappach
Ee325 cmos design   lab 5 report - loren k schwappachEe325 cmos design   lab 5 report - loren k schwappach
Ee325 cmos design lab 5 report - loren k schwappach
 
Ee325 cmos design lab 4 report - loren k schwappach
Ee325 cmos design   lab 4 report - loren k schwappachEe325 cmos design   lab 4 report - loren k schwappach
Ee325 cmos design lab 4 report - loren k schwappach
 
Ee325 cmos design lab 3 report - loren k schwappach
Ee325 cmos design   lab 3 report - loren k schwappachEe325 cmos design   lab 3 report - loren k schwappach
Ee325 cmos design lab 3 report - loren k schwappach
 
Loren k. schwappach ee331 - lab 4
Loren k. schwappach   ee331 - lab 4Loren k. schwappach   ee331 - lab 4
Loren k. schwappach ee331 - lab 4
 
Loren k. schwappach ee331 - lab 3
Loren k. schwappach   ee331 - lab 3Loren k. schwappach   ee331 - lab 3
Loren k. schwappach ee331 - lab 3
 
Ee343 signals and systems - lab 2 - loren schwappach
Ee343   signals and systems - lab 2 - loren schwappachEe343   signals and systems - lab 2 - loren schwappach
Ee343 signals and systems - lab 2 - loren schwappach
 
Ee343 signals and systems - lab 1 - loren schwappach
Ee343   signals and systems - lab 1 - loren schwappachEe343   signals and systems - lab 1 - loren schwappach
Ee343 signals and systems - lab 1 - loren schwappach
 
Ee 352 lab 1 (tutorial) - schwappach - 15 oct 09
Ee 352   lab 1 (tutorial) - schwappach - 15 oct 09Ee 352   lab 1 (tutorial) - schwappach - 15 oct 09
Ee 352 lab 1 (tutorial) - schwappach - 15 oct 09
 
EE375 Electronics 1: lab 3
EE375   Electronics 1: lab 3EE375   Electronics 1: lab 3
EE375 Electronics 1: lab 3
 
EE375 Electronics 1: lab 1
EE375   Electronics 1: lab 1EE375   Electronics 1: lab 1
EE375 Electronics 1: lab 1
 
Ee395 lab 2 - loren - victor - taylor
Ee395   lab 2 - loren - victor - taylorEe395   lab 2 - loren - victor - taylor
Ee395 lab 2 - loren - victor - taylor
 
Ee395 lab 1 - bjt - loren - victor - taylor
Ee395   lab 1 - bjt - loren - victor - taylorEe395   lab 1 - bjt - loren - victor - taylor
Ee395 lab 1 - bjt - loren - victor - taylor
 
5 ee415 - adv electronics - presentation - schwappach
5   ee415 - adv electronics - presentation - schwappach5   ee415 - adv electronics - presentation - schwappach
5 ee415 - adv electronics - presentation - schwappach
 
3 ee414 - adv electroncs - lab 2 - loren schwappach
3   ee414 - adv electroncs - lab 2 - loren schwappach3   ee414 - adv electroncs - lab 2 - loren schwappach
3 ee414 - adv electroncs - lab 2 - loren schwappach
 
2 ee414 - adv electroncs - lab 1 - loren schwappach
2   ee414 - adv electroncs - lab 1 - loren schwappach2   ee414 - adv electroncs - lab 1 - loren schwappach
2 ee414 - adv electroncs - lab 1 - loren schwappach
 
Ee443 phase locked loop - presentation - schwappach and brandy
Ee443   phase locked loop - presentation - schwappach and brandyEe443   phase locked loop - presentation - schwappach and brandy
Ee443 phase locked loop - presentation - schwappach and brandy
 

Recently uploaded

Transcript: New from BookNet Canada for 2024: BNC CataList - Tech Forum 2024
Transcript: New from BookNet Canada for 2024: BNC CataList - Tech Forum 2024Transcript: New from BookNet Canada for 2024: BNC CataList - Tech Forum 2024
Transcript: New from BookNet Canada for 2024: BNC CataList - Tech Forum 2024BookNet Canada
 
My INSURER PTE LTD - Insurtech Innovation Award 2024
My INSURER PTE LTD - Insurtech Innovation Award 2024My INSURER PTE LTD - Insurtech Innovation Award 2024
My INSURER PTE LTD - Insurtech Innovation Award 2024The Digital Insurer
 
New from BookNet Canada for 2024: BNC CataList - Tech Forum 2024
New from BookNet Canada for 2024: BNC CataList - Tech Forum 2024New from BookNet Canada for 2024: BNC CataList - Tech Forum 2024
New from BookNet Canada for 2024: BNC CataList - Tech Forum 2024BookNet Canada
 
The Future of Software Development - Devin AI Innovative Approach.pdf
The Future of Software Development - Devin AI Innovative Approach.pdfThe Future of Software Development - Devin AI Innovative Approach.pdf
The Future of Software Development - Devin AI Innovative Approach.pdfSeasiaInfotech2
 
DevoxxFR 2024 Reproducible Builds with Apache Maven
DevoxxFR 2024 Reproducible Builds with Apache MavenDevoxxFR 2024 Reproducible Builds with Apache Maven
DevoxxFR 2024 Reproducible Builds with Apache MavenHervé Boutemy
 
Install Stable Diffusion in windows machine
Install Stable Diffusion in windows machineInstall Stable Diffusion in windows machine
Install Stable Diffusion in windows machinePadma Pradeep
 
Gen AI in Business - Global Trends Report 2024.pdf
Gen AI in Business - Global Trends Report 2024.pdfGen AI in Business - Global Trends Report 2024.pdf
Gen AI in Business - Global Trends Report 2024.pdfAddepto
 
Tampa BSides - Chef's Tour of Microsoft Security Adoption Framework (SAF)
Tampa BSides - Chef's Tour of Microsoft Security Adoption Framework (SAF)Tampa BSides - Chef's Tour of Microsoft Security Adoption Framework (SAF)
Tampa BSides - Chef's Tour of Microsoft Security Adoption Framework (SAF)Mark Simos
 
Designing IA for AI - Information Architecture Conference 2024
Designing IA for AI - Information Architecture Conference 2024Designing IA for AI - Information Architecture Conference 2024
Designing IA for AI - Information Architecture Conference 2024Enterprise Knowledge
 
Story boards and shot lists for my a level piece
Story boards and shot lists for my a level pieceStory boards and shot lists for my a level piece
Story boards and shot lists for my a level piececharlottematthew16
 
SIP trunking in Janus @ Kamailio World 2024
SIP trunking in Janus @ Kamailio World 2024SIP trunking in Janus @ Kamailio World 2024
SIP trunking in Janus @ Kamailio World 2024Lorenzo Miniero
 
Vertex AI Gemini Prompt Engineering Tips
Vertex AI Gemini Prompt Engineering TipsVertex AI Gemini Prompt Engineering Tips
Vertex AI Gemini Prompt Engineering TipsMiki Katsuragi
 
Leverage Zilliz Serverless - Up to 50X Saving for Your Vector Storage Cost
Leverage Zilliz Serverless - Up to 50X Saving for Your Vector Storage CostLeverage Zilliz Serverless - Up to 50X Saving for Your Vector Storage Cost
Leverage Zilliz Serverless - Up to 50X Saving for Your Vector Storage CostZilliz
 
My Hashitalk Indonesia April 2024 Presentation
My Hashitalk Indonesia April 2024 PresentationMy Hashitalk Indonesia April 2024 Presentation
My Hashitalk Indonesia April 2024 PresentationRidwan Fadjar
 
"ML in Production",Oleksandr Bagan
"ML in Production",Oleksandr Bagan"ML in Production",Oleksandr Bagan
"ML in Production",Oleksandr BaganFwdays
 
CloudStudio User manual (basic edition):
CloudStudio User manual (basic edition):CloudStudio User manual (basic edition):
CloudStudio User manual (basic edition):comworks
 
Bun (KitWorks Team Study 노별마루 발표 2024.4.22)
Bun (KitWorks Team Study 노별마루 발표 2024.4.22)Bun (KitWorks Team Study 노별마루 발표 2024.4.22)
Bun (KitWorks Team Study 노별마루 발표 2024.4.22)Wonjun Hwang
 
Dev Dives: Streamline document processing with UiPath Studio Web
Dev Dives: Streamline document processing with UiPath Studio WebDev Dives: Streamline document processing with UiPath Studio Web
Dev Dives: Streamline document processing with UiPath Studio WebUiPathCommunity
 
Nell’iperspazio con Rocket: il Framework Web di Rust!
Nell’iperspazio con Rocket: il Framework Web di Rust!Nell’iperspazio con Rocket: il Framework Web di Rust!
Nell’iperspazio con Rocket: il Framework Web di Rust!Commit University
 

Recently uploaded (20)

Transcript: New from BookNet Canada for 2024: BNC CataList - Tech Forum 2024
Transcript: New from BookNet Canada for 2024: BNC CataList - Tech Forum 2024Transcript: New from BookNet Canada for 2024: BNC CataList - Tech Forum 2024
Transcript: New from BookNet Canada for 2024: BNC CataList - Tech Forum 2024
 
E-Vehicle_Hacking_by_Parul Sharma_null_owasp.pptx
E-Vehicle_Hacking_by_Parul Sharma_null_owasp.pptxE-Vehicle_Hacking_by_Parul Sharma_null_owasp.pptx
E-Vehicle_Hacking_by_Parul Sharma_null_owasp.pptx
 
My INSURER PTE LTD - Insurtech Innovation Award 2024
My INSURER PTE LTD - Insurtech Innovation Award 2024My INSURER PTE LTD - Insurtech Innovation Award 2024
My INSURER PTE LTD - Insurtech Innovation Award 2024
 
New from BookNet Canada for 2024: BNC CataList - Tech Forum 2024
New from BookNet Canada for 2024: BNC CataList - Tech Forum 2024New from BookNet Canada for 2024: BNC CataList - Tech Forum 2024
New from BookNet Canada for 2024: BNC CataList - Tech Forum 2024
 
The Future of Software Development - Devin AI Innovative Approach.pdf
The Future of Software Development - Devin AI Innovative Approach.pdfThe Future of Software Development - Devin AI Innovative Approach.pdf
The Future of Software Development - Devin AI Innovative Approach.pdf
 
DevoxxFR 2024 Reproducible Builds with Apache Maven
DevoxxFR 2024 Reproducible Builds with Apache MavenDevoxxFR 2024 Reproducible Builds with Apache Maven
DevoxxFR 2024 Reproducible Builds with Apache Maven
 
Install Stable Diffusion in windows machine
Install Stable Diffusion in windows machineInstall Stable Diffusion in windows machine
Install Stable Diffusion in windows machine
 
Gen AI in Business - Global Trends Report 2024.pdf
Gen AI in Business - Global Trends Report 2024.pdfGen AI in Business - Global Trends Report 2024.pdf
Gen AI in Business - Global Trends Report 2024.pdf
 
Tampa BSides - Chef's Tour of Microsoft Security Adoption Framework (SAF)
Tampa BSides - Chef's Tour of Microsoft Security Adoption Framework (SAF)Tampa BSides - Chef's Tour of Microsoft Security Adoption Framework (SAF)
Tampa BSides - Chef's Tour of Microsoft Security Adoption Framework (SAF)
 
Designing IA for AI - Information Architecture Conference 2024
Designing IA for AI - Information Architecture Conference 2024Designing IA for AI - Information Architecture Conference 2024
Designing IA for AI - Information Architecture Conference 2024
 
Story boards and shot lists for my a level piece
Story boards and shot lists for my a level pieceStory boards and shot lists for my a level piece
Story boards and shot lists for my a level piece
 
SIP trunking in Janus @ Kamailio World 2024
SIP trunking in Janus @ Kamailio World 2024SIP trunking in Janus @ Kamailio World 2024
SIP trunking in Janus @ Kamailio World 2024
 
Vertex AI Gemini Prompt Engineering Tips
Vertex AI Gemini Prompt Engineering TipsVertex AI Gemini Prompt Engineering Tips
Vertex AI Gemini Prompt Engineering Tips
 
Leverage Zilliz Serverless - Up to 50X Saving for Your Vector Storage Cost
Leverage Zilliz Serverless - Up to 50X Saving for Your Vector Storage CostLeverage Zilliz Serverless - Up to 50X Saving for Your Vector Storage Cost
Leverage Zilliz Serverless - Up to 50X Saving for Your Vector Storage Cost
 
My Hashitalk Indonesia April 2024 Presentation
My Hashitalk Indonesia April 2024 PresentationMy Hashitalk Indonesia April 2024 Presentation
My Hashitalk Indonesia April 2024 Presentation
 
"ML in Production",Oleksandr Bagan
"ML in Production",Oleksandr Bagan"ML in Production",Oleksandr Bagan
"ML in Production",Oleksandr Bagan
 
CloudStudio User manual (basic edition):
CloudStudio User manual (basic edition):CloudStudio User manual (basic edition):
CloudStudio User manual (basic edition):
 
Bun (KitWorks Team Study 노별마루 발표 2024.4.22)
Bun (KitWorks Team Study 노별마루 발표 2024.4.22)Bun (KitWorks Team Study 노별마루 발표 2024.4.22)
Bun (KitWorks Team Study 노별마루 발표 2024.4.22)
 
Dev Dives: Streamline document processing with UiPath Studio Web
Dev Dives: Streamline document processing with UiPath Studio WebDev Dives: Streamline document processing with UiPath Studio Web
Dev Dives: Streamline document processing with UiPath Studio Web
 
Nell’iperspazio con Rocket: il Framework Web di Rust!
Nell’iperspazio con Rocket: il Framework Web di Rust!Nell’iperspazio con Rocket: il Framework Web di Rust!
Nell’iperspazio con Rocket: il Framework Web di Rust!
 

Ee600 lab3 hal9000_grp

  • 1. Dan Wehnes, Loren Schwappach, Tom Thede EE600: Modern Solid State Devices Colorado Technical University 15 September 2011 1
  • 2. Presentation Overview  HAL 9000  System Description  Input / Output Requirements  Performance Requirements  Test Procedures / System Responses  Analysis of HAL 9000 Inverters  Critical Characteristics  Schematic  DC Analysis  Frequency Analysis  Propagation & Time Delays  Comparison  Conclusion 2
  • 3. System Description HAL 9000 Computer 3
  • 4. System Description  HAL – (H)euristically Programmed (AL)gorithmic Computer (Robot Hall of Fame, 2003)  Brain of the Space Ship Discovery in 2001: A Space Odyssey (Robot Hall of Fame, 2003)  Robot that Controls/Uses Mechanical, Sensing, and Information Systems of the Spaceship (Robot Hall of Fame, 2003)  Capabilities (Robot Hall of Fame, 2003):  Controls/Communicates with All Systems onboard Spaceship Discovery  Speech Output and Speech Recognition  Natural Language Understanding  Lip reading  Thinking Faster and Better than Humans 4
  • 5. Primary Input / Output Requirements Inputs Outputs Auditory EM Waves Capable of Life-Like Human Speech (Allows Speech Recognition) Visual EM Waves Visual Identification / Recognition (Allows Visual Recognition and Lip of Crew / Discovery’s Systems and Reading) Exterior Objects. Uses: Red Camera Eye Discovery’s Interior (Environmental) Controls all of Discovery’s Conditions Environmental and Life Support Systems Discovery’s Exterior (Space-Time) Can Control all Mechanical Conditions Systems/Vehicles that are part of Discovery Discovery’s System Outputs Controls All of Spaceship Discovery’s Functions to Include Electronics and Navigation 5
  • 6. Performance Requirements  Ensure Mission’s Success At Any Cost  Perform Advanced Artificial Intelligence (AI) Functions (Such as Decision Making and Emotional Awareness)  Operate in a Variety of Environments  Process Information at High Speeds  Control all Interior/Exterior Spaceship Functions 6
  • 7. Test Procedures / System Responses  Set Up  Scenario-Based Testing at System Level – Mission Success Defined  Component Level ○ Power and Grounding Requirements, Electro-Static Discharge (ESD) Protection ○ Lab Environment with Extreme Temperatures (space) ○ Durability – Shake, Rattle and Roll (Launch Simulation)  Action  System Level – Reaction to Anomalous Situations (asteroid belt)  Component Level - Switch Control Signals and Evaluate 7
  • 8. Test Procedures / System Responses  Reaction  System Level - Response to All Inputs from Spacecraft & Humans  Component Level - Correct Outputs Based on Inputs  Pass/Fail Criteria  System – Supportive of Humans and Their Directions  Clock Speed Measurements – Response Times to Inputs  Operating Region Evaluation – Controlled/Non-Controlled Environment  Environmental Testing – Entire Range of Launch and Space Environment  Failure Modes and Effects – Triple Redundancy for Human Space Flight  Power Usage Evaluation – Total vs. Allocated per Component  Use of Allocated Space and Weight on Discovery Spacecraft 8
  • 9. 9
  • 10. Inverter Selection – Critical Characteristics Critical Factors (Importance From Greatest to Least):  Performance:  Clock Speed –Fast Switching Speeds (GHz / THz)  Noise Immunity-NM  Minimum Power Usage  Reliability:  Resistance to Electrostatic Discharge (Ionization effects)  Minimal Repair Capability and Human Space Flight Rated – NASA and AFIT Certified  Robustness:  Maximum Durability 10
  • 11. Schematic 0 0 0 Vdd1 Vdd2 Vdd3 5Vdc 5Vdc 5Vdc CMOS Circuit BiCMOS Circuit TTL Circuit R1 R2 R4 PMOS PMOS2 4k 1.6k 130 MbreakpPMOS MbreakpPMOS W = 14u W = 14u L = 1u L = 1u Q1 Q5 Q2N3904 Q2N3904 CMOS_Out BiCMOS_Out Q4 Q2N3904 D1 Q3 D1N4002 NMOS C1 NMOS2 Q2N3904 MbreaknNMOS 90p MbreaknNMOS C2 TTL_Out W = 24u W = 24u 90p L = 1u L = 1u C3 Q2 Q6 90p Q2N3904 Q2N3904 R3 1k 0 Vin Shared 0Vdc Input Source 11
  • 12. DC Analysis – Output Slope Using Slope =-1 Points CMOS Vin(low) = 1.364 V Vin(high) = 2.078 V BiCMOS Vin(low) = 1.922 V Vin(high) = 2.494 V TTL Vin(low) = 606 mV Vin(high) = 1.437 V 12
  • 13. DC Analysis – Threshold Voltage Using Slope =1 (line) CMOS VThreshold = 1.854 V BiCMOS VThreshold = 2.316 V TTL VThreshold = 1.393 V 13
  • 14. DC Analysis – Noise Margins Noise Margins Results CMOS NMH = 2.759 V NML = 1.018 V BiCMOS NMH = 1.734 V NML = 990 mV TTL NMH = 3.305 V NML = 583 mV 14
  • 15. DC Analysis – Power Used Power Used Results CMOS At Vin=0V: 25 pW At Vin=5V: 25 pW At Vin=1.88V: 216 uW BiCMOS At Vin=0V: 453 pW At Vin=5V: 453 pW At Vin=2.34V: 17.5 mW TTL At Vin=0V: 5.38 mW At Vin=5V: 16.8 mW At Vin=1.43V: 165 mW 15
  • 16. Frequency Analysis Corner Frequency Results (f3dB) CMOS 6.09 kHz BiCMOS 68.55 kHz TTL 5.86 MHz 16
  • 17. Propagation & Time Delays CMOS Propagation Delays tPLH = t3-t1 = 1.232 us tPHL = t7-t5 = 230 ns tP = tPLH + tPHL = 1.462 us Rise & Fall Times tR = t4-t2 = 2.869 us tF = t8-t6 = 565 ns Max Frequency Fmax = 1/(TR+TF) = 291.2 kHz 17
  • 18. Propagation & Time Delays BiCMOS Propagation Delays tPLH = t3-t1 = 74 ns tPHL = t7-t5 = 23 ns tP = tPLH + tPHL = 97 ns Rise & Fall Times tR = t4-t2 = 212 ns tF = t8-t6 = 46 ns Max Frequency Fmax = 1/(TR+TF) = 3.876 MHz 18
  • 19. Propagation & Time Delays TTL Propagation Delays tPLH = t3-t1 = 268 ns tPHL = t7-t5 = 3 ns tP = tPLH + tPHL = 271 Rise & Fall Times tR = t4-t2 = 35 ns tF = t8-t6 = 5 ns Max Frequency Fmax = 1/(TR+TF) = 25 MHz 19
  • 20. Comparison of CMOS, BiCMOS, TTL Evaluation Ideal CMOS BiCMOS Lab 2d Parameter Procedure Inverter Inverter Inverter TTL Transfer VThreshold 2.5 V 1.854 V 2.316 V 1.393 V Characteristic NMH 2.5 V 2.759 V 1.734 V 3.305 V Noise Margins NML 2.5 V 1.018 V 990 mV 582 mV P @ Vin = 0 V 0W 25 pW 453 pW 5.38 mW Power Used P @ Vin = 5 V 0W 25 pW 453 pW 16.8 mW PMax 0W 216 uW 17.5 mW 165 mW tPDHL 0s 230 ns 23 ns 3 ns Propagation tPDLH 0s 1.232 us 74 ns 268 ns Delays tP 0s 1.462 us 97 ns 271 ns Rise Time tR 0s 2.869 us 212 ns 35 ns Fall Time tF 0s 565 ns 46 ns 5 ns 3dB Corner f3dB inf. 6.09 kHz 68.6 kHz 5.86 MHz Frequency Max Frequency fMax inf. 291 kHz 3.88 MHz 25 MHz 20
  • 21. Conclusions Analysis Results:  Performance:  Clock Speed –Fast Switching Speeds (GHz / THz) ○ WINNER: TTL  Noise Immunity ○ WINNER: CMOS  Minimum Power Usage ○ WINNER: CMOS  Reliability:  Resistance to Electrostatic Discharge (Ionization effects) ○ WINNER: TTL  Robustness:  Maximum Durability ○ WINNER: TTL Our Conclusion: Although TTL Won the Majority of Critical Requirements We Will Need to Analyze Additional Technologies Before Making a Final Decision 21
  • 22. Questions 22
  • 23. References Neamen, D. (2007). Microelectronics: Circuit Analysis and Design (3rd ed.). New York, NY: McGraw-Hill. Robot Hall of Fame. (2003). 2003 Inductees: HAL 9000. Retrieved September 15, 2011 from: http://www.robothalloffame.org/hal.html 2001 Space Sounds. (2003). 2001 A Space Odyssey Internet Resource Archive. Retrieved September 15, 2011 from: http://www.palantir.net/2001/sounds.html Movie Sounds. (2003). 2001: A Space Odyssey. Retrieved September 15, 2011 from: http://www.moviesounds.com/2001.html [Illustration of a HAL 9000]. (n.d.). Retrieved September 15, 2011, from: http://bugtraq.ru/library/underground/.keep/compscifi.hal9000.jpg [Picture of Dave, 2001 A Space Odyssey]. (n.d.). Retrieved September 15, 2011, from: http://www.google.com/imgres?q=2001+a+space+odyssey&hl=en&biw=1020& bih=891&tbs=isz:l&tbm=isch&tbnid=aV_lO0M1jkRAFM:&imgrefurl=http://proverbs ofhell.tumblr.com/post/1982878211/inspcollection-2001-a-space-odyssey- dave&docid=Rh2O6pBSIEt57M&w=1920&h=1080&ei=CVtyTvenD7KmsQLrtITfCQ &zoom=1 23
  • 24. References [Illustration of a Pilot at Console of Discovery Spaceship]. (n.d.). Retrieved September 15, 2011, from: http://4.bp.blogspot.com/_7J_WGI7Jygw/S45l1Tq6wPI/AAAAAAAAEtk/gddgrGL NXKw/s1600/2001%2BA%2BSpace%2BOdyssey%2BPic%2B046.jpg [Illustration of a Man in Discovery Spaceship’s HAL Memory Array]. (n.d.). Retrieved September 15, 2011, from: http://wodumedia.com/wp-content/uploads/HAL- 9000-is-about-to-get-his-hard-drive-fried-by-a-seriously-pissed-off-Dave.jpg 24

Editor's Notes

  1. Introduce the presentation and speakers.
  2. Today we’ll go over the following topics.
  3. Heuristic (experience-based) and Algorithmic are two primary processes of intelligence programmed into the Hal 900 system
  4. The HAL 9000 system level capabilities are shown to include capabilities that were learned using artificial intelligence (i.e., lip reading)
  5. Inputs:Speech from humans – speech recognitionAuditory recognition – can hear sounds and process themVisual recognition – ID of crewlip reading abilityEnvironment – is aware of its surrounding environments, such as life support systems and meteor detectionInformation systems – information about the crew’s missionHuman emotions – aware of human emotionsOutputs:Mechanical functions – controls the spaceshipSpeech – has its own voice used to interact with the crewDisplay of information – displays to crewRed eye – representation of actionProcessed information – takes appropriate action to a given command or situationReproducing emotion – has psyche similar to humans, fear of death
  6. Top-level system performance requirements for the HAL 9000 were defined so they can be used in lower level component evaluations
  7. HAL 9000 has system-level performance requirements that need to flow down to each component in the system (decomposition) and then tested appropriately at each level Focus of this project is the gate selection and evaluation process; therefore, allocated requirements need to be tested and evaluated prior to use in the system The lab environment has to take care of basic component requirements like power and grounding while taking into account launch and spaceflight qualifications during the test process Seeing the HAL 9000 is responsible for the overall operations of the spacecraft and its environment, it must be able to respond appropriately to maintain the mission – for the inverter, this means that negative consequences do not occur if the incorrect control signal is received – using components with high noise margins will improve its susceptibility to errors Overall system must be able to react to any system input and provide an appropriate response because of the changing space environment and unlimited inputs from the humans – for the inverter, that means that it properly inverts an incoming signal with a high level of confidence – inputting a variety of signals and evaluating the response during modeling will address this area Under the pass/fail criteria for the system, support for the humans and success of the mission should be the ultimate goals of the system; however, to support component level testing, lower level pass/fail criteria must be established to properly evaluate the system and arrive at the correct solution (minimize probability of selecting incorrect component) which lead to the critical characteristics of the lower level components identified on the next slide
  8. HAL 9000 has system-level performance requirements that need to flow down to each component in the system (decomposition) and then tested appropriately at each level Focus of this project is the gate selection and evaluation process; therefore, allocated requirements need to be tested and evaluated prior to use in the system The lab environment has to take care of basic component requirements like power and grounding while taking into account launch and spaceflight qualifications during the test process Seeing the HAL 9000 is responsible for the overall operations of the spacecraft and its environment, it must be able to respond appropriately to maintain the mission – for the inverter, this means that negative consequences do not occur if the incorrect control signal is received – using components with high noise margins will improve its susceptibility to errors Overall system must be able to react to any system input and provide an appropriate response because of the changing space environment and unlimited inputs form the humans – for the inverter, that means that it properly inverts an incoming signal with a high level of confidence – inputting a variety of signals and evaluating the response during modeling will address this area Under the pass/fail criteria for the system, support for the humans and success of the mission should be the ultimate goals of the system; however, to support component level testing, lower level pass/fail criteria must be established to properly evaluate the system and arrive at the correct solution (minimize probability of selecting incorrect component) which lead to the critical characteristics of the lower level components identified on the next slide
  9. The evaluation process for determining the best logic inverter for the HAL 9000 are provided in the following slides
  10. The critical characteristics listed on this slide will be used as part of the evaluation criteria to ensure the correct inverter component is selected for the HAL 9000 system Some of these characteristics are based on normal operating parameters for inverters with the remainder of the characteristics based on the launch and spaceflight environments that the component is going to have to operate in during its lifetime
  11. Schematics for each of the integrated circuits evaluated are shown on this slide
  12. This slide provides a comparison of the DC characteristic of output slope for each of the integrated circuits evaluated. Color coding and text boxes were used to show the results clearly and differentiate between the different circuits evaluated
  13. This slide provides a comparison of the DC characteristic of threshold voltage for each of the integrated circuits evaluated
  14. This slide provides a comparison of the DC characteristic of noise margins for each of the integrated circuits evaluated
  15. This slide provides a comparison of the DC characteristic of power used for each of the integrated circuits evaluated
  16. This slide provides a comparison of the frequency analysis for each of the integrated circuits evaluated
  17. This slide shows the propagation and time delays for the CMOS circuit
  18. This slide shows the propagation and time delays for the BiCMOS circuit
  19. This slide shows the propagation and time delays for the TTL circuit
  20. This table provides a comparison of the operating parameters for each circuit evaluated with the best value highlighted in green and the ideal value shown in blueAs displayed by the table, the CMOS has the best power characteristics while the TLL has the best speed characteristics with the BiCMOS having values in between the other two circuits evaluated
  21. Based on the critical characterstics evaluated for each circuit, the TTL was the best choice of the three circuits evaluated; however, other technologies need to be analyzed before making a final design on the best logic inverter for the HAL 9000 system
  22. Are there any questions ?
  23. Referencesforthepresentation are shown