SlideShare uma empresa Scribd logo
1 de 20
Using the Cypress PSoC
       Processor




            January 15, 2011
              Lloyd Moore
 President/Owner, CyberData Corporation
Overview
   Programmable Systems On Chip
   Cypress Family
   PSoC 3/5 Architectural Overview
   Configurable Components
   Development Environment
   Cool Peripherals For Robotics
   Best Practices
   Resources
Programmable Systems on Chip
   Single chip contains:
       Traditional processor
       Traditional peripherals
       CPLD/FPGA hardware
       Analog hardware
       Programmable analog hardware
   Primary advantages are reduced part count, reduced
    cost, increased flexibility and increased reliability
   Several now on the market
       Actel SmartFusion
       Xilinx
       Cypress PSoC
Cypress PSoC Family
   PSoC 1
       The original design
       8 bit M8C core, 4 MIPS
       Available since 2001
   Power PSoC
       Simple devices, for LED lighting and motor control
       Have high current FETs on board (1A range)
   PSoC 3
       Redesign of development tool chain
       Redesign of analog blocks
       Enhanced 8051 core, 33 MIPS
       Production parts available December 2010
   PSoC 5
       Same base architecture as PSoC 3 + 2 additional SAR ADCs
       32 bit ARM Cortex M3 core, 100 Dhrystone MIPS
       Sampling now, production parts Q2 2011
   Will be talking only about the PSoC 3 & 5 today
Cypress PSoC Family
   Programmable in ‘C’ or assembly
        ‘C’ is the default / recommended language
   Low cost of entry
        $50 to $250 for development kits
        Development tools are a free download
             PSoC Creator
             PSoC Programmer
             C – Compiler (Keil for PSoC3, GCC for PSoC5)
   Good balance of processor, analog blocks and digital blocks
   Single chip solution for many designs
   Can start with the PSoC 3 and easily migrate to PSoC 5 when
    available / needed
        Plan for this in your design to make it smooth
        Only a recompile needed in many cases
        CANNOT migrate to/from PSoC 1
PSoC 3 & 5 Architecture
Universal Digital Blocks




   Each block contains 2 PLD blocks
   The Datapath is a programmable ALU
       8 bit single cycle ALU with shift and mask operations
       2 Accumulators
       2 Data registers
       2 FIFO banks (4 bytes deep)
   PLD usage can be decoupled from Datapath
       Allows for more efficient resource mappings
       Cross individual block boundaries
   PLD and Datapath blocks can be chained for 16-32 bit operations
UDB Uses
   Counters
   Timers
   PWM
   UART
   Combinational discrete logic
   Pseudo random number generator
   Quadrature Encoder
   CRC
   Many, many others
SC/CT Blocks




   Basically an op-amp core with programmable
    resistors and capacitors attached
   Used for building
       More op-amps!, Programmable gain amplifiers
       Transimpedance amps, Mixers
       Sample and hold amplifiers
Prebuilt Components
   Hardware components normally combined to make what you need
    for your application
   Large library of prebuilt components available
   Each component consists of
       Hardware specification (Graphical or VHDL)
       Schematic symbol for graphical editor
       ‘C’ API
       Datasheet
       Custom configuration dialog
   Extensive abilities to also create your own components
       VHDL or graphical design for hardware description
       PDF for the datasheet
       .NET for configuration dialog
       Complete SDK in the tool chain for building these
Development Environment
   PSoC Creator – Full IDE
       Pretty similar to Visual Studio or Eclipse
       Hardware aspects programmed with a schematic capture style tool
       Integrated programmer / debugger
CapSense Module
   Very flexible architecture
       Individual buttons, matrix of buttons
       Linear sliders, radial sliders
       Full touch pads
       Proximity sensors
            Works with most materials, not just fingers!
   Manual and automatic tuning
       GUI tuning application to assist
LCD Module
   Modes:
       Character
       Graphic
       Segment
   Character LCD VERY helpful for debugging
    even if not needed for application
       Very simple API, base data types supported
       Can upgrade default LCD in dev kit
            Lumex family of character displays, 4/8 bit parallel interface
Boost Converter
   Input from 0.5V to 5.5V
       Allows for input from a solar cell / energy harvesting
   Requires an external inductor, capacitor and
    optional diode
   Source up to 30mA with internal diode, 50mA
    with external diode
   Can also be used to form a regulated power
    supply not used by the processor
Best Practices
   Develop the hardware layer first
       Will automatically generate API for you
   Implement timing critical functions in hardware,
    complex functions in software
   Use provided APIs and macros
       Allows for component upgrades automatically
       Allows for conversion of projects between PSoC3 and
        PSoC5 with minimal changes
            Also different processors in the same family
More Best Practices
   Reserve and use “debug pins” to access internal
    signals
   Keep digital and analog signals separate
       Analog domain clocks available
       Processor die split, orient this with board layout
   Use dedicated pins for internal op-amps
       Reduced silicon switch resistance
   Buffer analog signals
       Most internal sources have very minimal drive
        capability
And MORE Best Practices
   Watch for hardware race conditions
       Use a higher frequency clock and “sequencer block” to control
        complex sequential logic
       Many resets and presets require a clock cycle to take effect
       May look like it works, but happening “by chance”
   Read and know the items on the errata sheets!
       Development tools can also adjust for errata items
   Reserve time for experimentation
       MANY ways to do things on this processor
       Power of the processor comes from flexibility
       Distinction between hardware and software largely gone
       Combining hardware and software approach often the cleanest
        and simplest solution
Summary
   The PSoC processor integrates programmable
    analog and digital with a traditional processing
    core
   The PSoC can be a one chip solution for many
    robotics projects
   Develop the hardware configuration first and
    then develop the software, leaving time to
    experiment with different configurations
Resources
   PSoC Product Web Site:
       http://www.cypress.com/?id=1353
   PSoC Developer Community:
       http://www.psocdeveloper.com/forums/
   PSoC Training On Demand:
       http://www.cypress.com/training
   PSoC 5 FirstTouch Starter Kit: $50
       http://www.cypress.com/?rID=43674
   PSoC Full Development Kit (1, 3, 5): $249
       http://www.cypress.com/?rID=37464
   My Contact Info:
       Lloyd@CyberData-Robotics.com
       http://www.CyberData-Robotics.com
Questions????
   IDE demo if time
   Will be around a bit after the meeting for
    individual questions
   Feel free to e-mail me

Mais conteúdo relacionado

Mais procurados

Soc architecture and design
Soc architecture and designSoc architecture and design
Soc architecture and designSatya Harish
 
Enabling Cross-platform Deep Learning Applications with Intel OpenVINO™
Enabling Cross-platform Deep Learning Applications with Intel OpenVINO™Enabling Cross-platform Deep Learning Applications with Intel OpenVINO™
Enabling Cross-platform Deep Learning Applications with Intel OpenVINO™Yury Gorbachev
 
Advanced Single Instruction Multiple Data (SIMD) Programming with Intel® Impl...
Advanced Single Instruction Multiple Data (SIMD) Programming with Intel® Impl...Advanced Single Instruction Multiple Data (SIMD) Programming with Intel® Impl...
Advanced Single Instruction Multiple Data (SIMD) Programming with Intel® Impl...Intel® Software
 
"How to Get the Best Deep Learning Performance with the OpenVINO Toolkit," a ...
"How to Get the Best Deep Learning Performance with the OpenVINO Toolkit," a ..."How to Get the Best Deep Learning Performance with the OpenVINO Toolkit," a ...
"How to Get the Best Deep Learning Performance with the OpenVINO Toolkit," a ...Edge AI and Vision Alliance
 
Product wise computer vision development
Product wise computer vision developmentProduct wise computer vision development
Product wise computer vision developmentYoss Cohen
 
"The Vision API Maze: Options and Trade-offs," a Presentation from the Khrono...
"The Vision API Maze: Options and Trade-offs," a Presentation from the Khrono..."The Vision API Maze: Options and Trade-offs," a Presentation from the Khrono...
"The Vision API Maze: Options and Trade-offs," a Presentation from the Khrono...Edge AI and Vision Alliance
 
Enhance and Accelerate Your AI and Machine Learning Solution | SIGGRAPH 2019 ...
Enhance and Accelerate Your AI and Machine Learning Solution | SIGGRAPH 2019 ...Enhance and Accelerate Your AI and Machine Learning Solution | SIGGRAPH 2019 ...
Enhance and Accelerate Your AI and Machine Learning Solution | SIGGRAPH 2019 ...Intel® Software
 
Darshan Dehuniya - Resume - ASIC Verification Engineer (1)
Darshan Dehuniya - Resume - ASIC Verification Engineer  (1)Darshan Dehuniya - Resume - ASIC Verification Engineer  (1)
Darshan Dehuniya - Resume - ASIC Verification Engineer (1)Darshan Dehuniya
 
KaiSemi - FPGA to ASIC Conversions
KaiSemi  - FPGA to ASIC ConversionsKaiSemi  - FPGA to ASIC Conversions
KaiSemi - FPGA to ASIC Conversionskaisemi
 
ScilabTEC 2015 - Xilinx
ScilabTEC 2015 - XilinxScilabTEC 2015 - Xilinx
ScilabTEC 2015 - XilinxScilab
 
Simple Single Instruction Multiple Data (SIMD) with the Intel® Implicit SPMD ...
Simple Single Instruction Multiple Data (SIMD) with the Intel® Implicit SPMD ...Simple Single Instruction Multiple Data (SIMD) with the Intel® Implicit SPMD ...
Simple Single Instruction Multiple Data (SIMD) with the Intel® Implicit SPMD ...Intel® Software
 
TDC2019 Intel Software Day - Otimizacao grafica com o Intel GPA
TDC2019 Intel Software Day - Otimizacao grafica com o Intel GPATDC2019 Intel Software Day - Otimizacao grafica com o Intel GPA
TDC2019 Intel Software Day - Otimizacao grafica com o Intel GPAtdc-globalcode
 

Mais procurados (20)

OpenVINO introduction
OpenVINO introductionOpenVINO introduction
OpenVINO introduction
 
Host Simulation
Host SimulationHost Simulation
Host Simulation
 
Soc architecture and design
Soc architecture and designSoc architecture and design
Soc architecture and design
 
Enabling Cross-platform Deep Learning Applications with Intel OpenVINO™
Enabling Cross-platform Deep Learning Applications with Intel OpenVINO™Enabling Cross-platform Deep Learning Applications with Intel OpenVINO™
Enabling Cross-platform Deep Learning Applications with Intel OpenVINO™
 
Advanced Single Instruction Multiple Data (SIMD) Programming with Intel® Impl...
Advanced Single Instruction Multiple Data (SIMD) Programming with Intel® Impl...Advanced Single Instruction Multiple Data (SIMD) Programming with Intel® Impl...
Advanced Single Instruction Multiple Data (SIMD) Programming with Intel® Impl...
 
"How to Get the Best Deep Learning Performance with the OpenVINO Toolkit," a ...
"How to Get the Best Deep Learning Performance with the OpenVINO Toolkit," a ..."How to Get the Best Deep Learning Performance with the OpenVINO Toolkit," a ...
"How to Get the Best Deep Learning Performance with the OpenVINO Toolkit," a ...
 
Product wise computer vision development
Product wise computer vision developmentProduct wise computer vision development
Product wise computer vision development
 
Openvino ncs2
Openvino ncs2Openvino ncs2
Openvino ncs2
 
SoC Design
SoC DesignSoC Design
SoC Design
 
"The Vision API Maze: Options and Trade-offs," a Presentation from the Khrono...
"The Vision API Maze: Options and Trade-offs," a Presentation from the Khrono..."The Vision API Maze: Options and Trade-offs," a Presentation from the Khrono...
"The Vision API Maze: Options and Trade-offs," a Presentation from the Khrono...
 
Enhance and Accelerate Your AI and Machine Learning Solution | SIGGRAPH 2019 ...
Enhance and Accelerate Your AI and Machine Learning Solution | SIGGRAPH 2019 ...Enhance and Accelerate Your AI and Machine Learning Solution | SIGGRAPH 2019 ...
Enhance and Accelerate Your AI and Machine Learning Solution | SIGGRAPH 2019 ...
 
Embedded C workshop
Embedded C workshopEmbedded C workshop
Embedded C workshop
 
Darshan Dehuniya - Resume - ASIC Verification Engineer (1)
Darshan Dehuniya - Resume - ASIC Verification Engineer  (1)Darshan Dehuniya - Resume - ASIC Verification Engineer  (1)
Darshan Dehuniya - Resume - ASIC Verification Engineer (1)
 
SOC design
SOC design SOC design
SOC design
 
KaiSemi - FPGA to ASIC Conversions
KaiSemi  - FPGA to ASIC ConversionsKaiSemi  - FPGA to ASIC Conversions
KaiSemi - FPGA to ASIC Conversions
 
ASIC vs SOC vs FPGA
ASIC  vs SOC  vs FPGAASIC  vs SOC  vs FPGA
ASIC vs SOC vs FPGA
 
Software analyst resume
Software analyst resumeSoftware analyst resume
Software analyst resume
 
ScilabTEC 2015 - Xilinx
ScilabTEC 2015 - XilinxScilabTEC 2015 - Xilinx
ScilabTEC 2015 - Xilinx
 
Simple Single Instruction Multiple Data (SIMD) with the Intel® Implicit SPMD ...
Simple Single Instruction Multiple Data (SIMD) with the Intel® Implicit SPMD ...Simple Single Instruction Multiple Data (SIMD) with the Intel® Implicit SPMD ...
Simple Single Instruction Multiple Data (SIMD) with the Intel® Implicit SPMD ...
 
TDC2019 Intel Software Day - Otimizacao grafica com o Intel GPA
TDC2019 Intel Software Day - Otimizacao grafica com o Intel GPATDC2019 Intel Software Day - Otimizacao grafica com o Intel GPA
TDC2019 Intel Software Day - Otimizacao grafica com o Intel GPA
 

Semelhante a Using the Cypress PSoC Processor

Design of 32 Bit Processor Using 8051 and Leon3 (Progress Report)
Design of 32 Bit Processor Using 8051 and Leon3 (Progress Report)Design of 32 Bit Processor Using 8051 and Leon3 (Progress Report)
Design of 32 Bit Processor Using 8051 and Leon3 (Progress Report)Talal Khaliq
 
An Overview on Programmable System on Chip: PSoC-5
An Overview on Programmable System on Chip: PSoC-5An Overview on Programmable System on Chip: PSoC-5
An Overview on Programmable System on Chip: PSoC-5Premier Farnell
 
System_on_Chip_SOC.ppt
System_on_Chip_SOC.pptSystem_on_Chip_SOC.ppt
System_on_Chip_SOC.pptzahixdd
 
An introduction to digital signal processors 1
An introduction to digital signal processors 1An introduction to digital signal processors 1
An introduction to digital signal processors 1Hossam Hassan
 
Microcontroller from basic_to_advanced
Microcontroller from basic_to_advancedMicrocontroller from basic_to_advanced
Microcontroller from basic_to_advancedImran Sheikh
 
Design of Software for Embedded Systems
Design of Software for Embedded SystemsDesign of Software for Embedded Systems
Design of Software for Embedded SystemsPeter Tröger
 
How to Select Hardware for Internet of Things Systems?
How to Select Hardware for Internet of Things Systems?How to Select Hardware for Internet of Things Systems?
How to Select Hardware for Internet of Things Systems?Hannes Tschofenig
 
Raspberry pi robotics
Raspberry pi roboticsRaspberry pi robotics
Raspberry pi roboticsLloydMoore
 
1.1. SOC AND MULTICORE ARCHITECTURES FOR EMBEDDED SYSTEMS (2).pdf
1.1. SOC AND MULTICORE ARCHITECTURES FOR EMBEDDED SYSTEMS (2).pdf1.1. SOC AND MULTICORE ARCHITECTURES FOR EMBEDDED SYSTEMS (2).pdf
1.1. SOC AND MULTICORE ARCHITECTURES FOR EMBEDDED SYSTEMS (2).pdfenriquealbabaena6868
 
FPGA_prototyping proccesing with conclusion
FPGA_prototyping proccesing with conclusionFPGA_prototyping proccesing with conclusion
FPGA_prototyping proccesing with conclusionPersiPersi1
 
UNIT 1 SONCA.pptx
UNIT 1 SONCA.pptxUNIT 1 SONCA.pptx
UNIT 1 SONCA.pptxmohan134666
 
SYBSC IT SEM IV EMBEDDED SYSTEMS UNIT I Core of Embedded Systems
SYBSC IT SEM IV EMBEDDED SYSTEMS UNIT I   Core of Embedded SystemsSYBSC IT SEM IV EMBEDDED SYSTEMS UNIT I   Core of Embedded Systems
SYBSC IT SEM IV EMBEDDED SYSTEMS UNIT I Core of Embedded SystemsArti Parab Academics
 
01. introduction to embedded systems
01. introduction to embedded systems01. introduction to embedded systems
01. introduction to embedded systemsayush1313
 

Semelhante a Using the Cypress PSoC Processor (20)

soc design for dsp applications
soc design for dsp applicationssoc design for dsp applications
soc design for dsp applications
 
Design of 32 Bit Processor Using 8051 and Leon3 (Progress Report)
Design of 32 Bit Processor Using 8051 and Leon3 (Progress Report)Design of 32 Bit Processor Using 8051 and Leon3 (Progress Report)
Design of 32 Bit Processor Using 8051 and Leon3 (Progress Report)
 
An Overview on Programmable System on Chip: PSoC-5
An Overview on Programmable System on Chip: PSoC-5An Overview on Programmable System on Chip: PSoC-5
An Overview on Programmable System on Chip: PSoC-5
 
Choosing the right processor
Choosing the right processorChoosing the right processor
Choosing the right processor
 
System_on_Chip_SOC.ppt
System_on_Chip_SOC.pptSystem_on_Chip_SOC.ppt
System_on_Chip_SOC.ppt
 
An introduction to digital signal processors 1
An introduction to digital signal processors 1An introduction to digital signal processors 1
An introduction to digital signal processors 1
 
EEE226a.ppt
EEE226a.pptEEE226a.ppt
EEE226a.ppt
 
The Cell Processor
The Cell ProcessorThe Cell Processor
The Cell Processor
 
Microcontroller from basic_to_advanced
Microcontroller from basic_to_advancedMicrocontroller from basic_to_advanced
Microcontroller from basic_to_advanced
 
Introduction to Blackfin BF532 DSP
Introduction to Blackfin BF532 DSPIntroduction to Blackfin BF532 DSP
Introduction to Blackfin BF532 DSP
 
Embedded systems
Embedded systemsEmbedded systems
Embedded systems
 
Design of Software for Embedded Systems
Design of Software for Embedded SystemsDesign of Software for Embedded Systems
Design of Software for Embedded Systems
 
How to Select Hardware for Internet of Things Systems?
How to Select Hardware for Internet of Things Systems?How to Select Hardware for Internet of Things Systems?
How to Select Hardware for Internet of Things Systems?
 
Raspberry pi robotics
Raspberry pi roboticsRaspberry pi robotics
Raspberry pi robotics
 
Embedded system
Embedded systemEmbedded system
Embedded system
 
1.1. SOC AND MULTICORE ARCHITECTURES FOR EMBEDDED SYSTEMS (2).pdf
1.1. SOC AND MULTICORE ARCHITECTURES FOR EMBEDDED SYSTEMS (2).pdf1.1. SOC AND MULTICORE ARCHITECTURES FOR EMBEDDED SYSTEMS (2).pdf
1.1. SOC AND MULTICORE ARCHITECTURES FOR EMBEDDED SYSTEMS (2).pdf
 
FPGA_prototyping proccesing with conclusion
FPGA_prototyping proccesing with conclusionFPGA_prototyping proccesing with conclusion
FPGA_prototyping proccesing with conclusion
 
UNIT 1 SONCA.pptx
UNIT 1 SONCA.pptxUNIT 1 SONCA.pptx
UNIT 1 SONCA.pptx
 
SYBSC IT SEM IV EMBEDDED SYSTEMS UNIT I Core of Embedded Systems
SYBSC IT SEM IV EMBEDDED SYSTEMS UNIT I   Core of Embedded SystemsSYBSC IT SEM IV EMBEDDED SYSTEMS UNIT I   Core of Embedded Systems
SYBSC IT SEM IV EMBEDDED SYSTEMS UNIT I Core of Embedded Systems
 
01. introduction to embedded systems
01. introduction to embedded systems01. introduction to embedded systems
01. introduction to embedded systems
 

Mais de LloydMoore

Less Magical Numbers - A coding standard proposal
Less Magical Numbers - A coding standard proposalLess Magical Numbers - A coding standard proposal
Less Magical Numbers - A coding standard proposalLloydMoore
 
Debugging Intermittent Issues - A How To
Debugging Intermittent Issues - A How ToDebugging Intermittent Issues - A How To
Debugging Intermittent Issues - A How ToLloydMoore
 
Successful Software Projects - What you need to consider
Successful Software Projects - What you need to considerSuccessful Software Projects - What you need to consider
Successful Software Projects - What you need to considerLloydMoore
 
A Slice Of Rust - A quick look at the Rust programming language
A Slice Of Rust - A quick look at the Rust programming languageA Slice Of Rust - A quick look at the Rust programming language
A Slice Of Rust - A quick look at the Rust programming languageLloydMoore
 
What Have We Lost - A look at some historical techniques
What Have We Lost - A look at some historical techniquesWhat Have We Lost - A look at some historical techniques
What Have We Lost - A look at some historical techniquesLloydMoore
 
High Reliabilty Systems
High Reliabilty SystemsHigh Reliabilty Systems
High Reliabilty SystemsLloydMoore
 
Real Time Debugging - What to do when a breakpoint just won't do
Real Time Debugging - What to do when a breakpoint just won't doReal Time Debugging - What to do when a breakpoint just won't do
Real Time Debugging - What to do when a breakpoint just won't doLloydMoore
 
C for Microcontrollers
C for MicrocontrollersC for Microcontrollers
C for MicrocontrollersLloydMoore
 
Starting Raspberry Pi
Starting Raspberry PiStarting Raspberry Pi
Starting Raspberry PiLloydMoore
 

Mais de LloydMoore (10)

Less Magical Numbers - A coding standard proposal
Less Magical Numbers - A coding standard proposalLess Magical Numbers - A coding standard proposal
Less Magical Numbers - A coding standard proposal
 
Debugging Intermittent Issues - A How To
Debugging Intermittent Issues - A How ToDebugging Intermittent Issues - A How To
Debugging Intermittent Issues - A How To
 
Successful Software Projects - What you need to consider
Successful Software Projects - What you need to considerSuccessful Software Projects - What you need to consider
Successful Software Projects - What you need to consider
 
A Slice Of Rust - A quick look at the Rust programming language
A Slice Of Rust - A quick look at the Rust programming languageA Slice Of Rust - A quick look at the Rust programming language
A Slice Of Rust - A quick look at the Rust programming language
 
What Have We Lost - A look at some historical techniques
What Have We Lost - A look at some historical techniquesWhat Have We Lost - A look at some historical techniques
What Have We Lost - A look at some historical techniques
 
High Reliabilty Systems
High Reliabilty SystemsHigh Reliabilty Systems
High Reliabilty Systems
 
Real Time Debugging - What to do when a breakpoint just won't do
Real Time Debugging - What to do when a breakpoint just won't doReal Time Debugging - What to do when a breakpoint just won't do
Real Time Debugging - What to do when a breakpoint just won't do
 
PSoC USB HID
PSoC USB HIDPSoC USB HID
PSoC USB HID
 
C for Microcontrollers
C for MicrocontrollersC for Microcontrollers
C for Microcontrollers
 
Starting Raspberry Pi
Starting Raspberry PiStarting Raspberry Pi
Starting Raspberry Pi
 

Último

Are Multi-Cloud and Serverless Good or Bad?
Are Multi-Cloud and Serverless Good or Bad?Are Multi-Cloud and Serverless Good or Bad?
Are Multi-Cloud and Serverless Good or Bad?Mattias Andersson
 
The Role of FIDO in a Cyber Secure Netherlands: FIDO Paris Seminar.pptx
The Role of FIDO in a Cyber Secure Netherlands: FIDO Paris Seminar.pptxThe Role of FIDO in a Cyber Secure Netherlands: FIDO Paris Seminar.pptx
The Role of FIDO in a Cyber Secure Netherlands: FIDO Paris Seminar.pptxLoriGlavin3
 
SIP trunking in Janus @ Kamailio World 2024
SIP trunking in Janus @ Kamailio World 2024SIP trunking in Janus @ Kamailio World 2024
SIP trunking in Janus @ Kamailio World 2024Lorenzo Miniero
 
WordPress Websites for Engineers: Elevate Your Brand
WordPress Websites for Engineers: Elevate Your BrandWordPress Websites for Engineers: Elevate Your Brand
WordPress Websites for Engineers: Elevate Your Brandgvaughan
 
Unleash Your Potential - Namagunga Girls Coding Club
Unleash Your Potential - Namagunga Girls Coding ClubUnleash Your Potential - Namagunga Girls Coding Club
Unleash Your Potential - Namagunga Girls Coding ClubKalema Edgar
 
TrustArc Webinar - How to Build Consumer Trust Through Data Privacy
TrustArc Webinar - How to Build Consumer Trust Through Data PrivacyTrustArc Webinar - How to Build Consumer Trust Through Data Privacy
TrustArc Webinar - How to Build Consumer Trust Through Data PrivacyTrustArc
 
Moving Beyond Passwords: FIDO Paris Seminar.pdf
Moving Beyond Passwords: FIDO Paris Seminar.pdfMoving Beyond Passwords: FIDO Paris Seminar.pdf
Moving Beyond Passwords: FIDO Paris Seminar.pdfLoriGlavin3
 
From Family Reminiscence to Scholarly Archive .
From Family Reminiscence to Scholarly Archive .From Family Reminiscence to Scholarly Archive .
From Family Reminiscence to Scholarly Archive .Alan Dix
 
DevoxxFR 2024 Reproducible Builds with Apache Maven
DevoxxFR 2024 Reproducible Builds with Apache MavenDevoxxFR 2024 Reproducible Builds with Apache Maven
DevoxxFR 2024 Reproducible Builds with Apache MavenHervé Boutemy
 
New from BookNet Canada for 2024: BNC CataList - Tech Forum 2024
New from BookNet Canada for 2024: BNC CataList - Tech Forum 2024New from BookNet Canada for 2024: BNC CataList - Tech Forum 2024
New from BookNet Canada for 2024: BNC CataList - Tech Forum 2024BookNet Canada
 
Digital Identity is Under Attack: FIDO Paris Seminar.pptx
Digital Identity is Under Attack: FIDO Paris Seminar.pptxDigital Identity is Under Attack: FIDO Paris Seminar.pptx
Digital Identity is Under Attack: FIDO Paris Seminar.pptxLoriGlavin3
 
DSPy a system for AI to Write Prompts and Do Fine Tuning
DSPy a system for AI to Write Prompts and Do Fine TuningDSPy a system for AI to Write Prompts and Do Fine Tuning
DSPy a system for AI to Write Prompts and Do Fine TuningLars Bell
 
Take control of your SAP testing with UiPath Test Suite
Take control of your SAP testing with UiPath Test SuiteTake control of your SAP testing with UiPath Test Suite
Take control of your SAP testing with UiPath Test SuiteDianaGray10
 
Transcript: New from BookNet Canada for 2024: BNC CataList - Tech Forum 2024
Transcript: New from BookNet Canada for 2024: BNC CataList - Tech Forum 2024Transcript: New from BookNet Canada for 2024: BNC CataList - Tech Forum 2024
Transcript: New from BookNet Canada for 2024: BNC CataList - Tech Forum 2024BookNet Canada
 
How to write a Business Continuity Plan
How to write a Business Continuity PlanHow to write a Business Continuity Plan
How to write a Business Continuity PlanDatabarracks
 
The State of Passkeys with FIDO Alliance.pptx
The State of Passkeys with FIDO Alliance.pptxThe State of Passkeys with FIDO Alliance.pptx
The State of Passkeys with FIDO Alliance.pptxLoriGlavin3
 
The Ultimate Guide to Choosing WordPress Pros and Cons
The Ultimate Guide to Choosing WordPress Pros and ConsThe Ultimate Guide to Choosing WordPress Pros and Cons
The Ultimate Guide to Choosing WordPress Pros and ConsPixlogix Infotech
 
TeamStation AI System Report LATAM IT Salaries 2024
TeamStation AI System Report LATAM IT Salaries 2024TeamStation AI System Report LATAM IT Salaries 2024
TeamStation AI System Report LATAM IT Salaries 2024Lonnie McRorey
 
Commit 2024 - Secret Management made easy
Commit 2024 - Secret Management made easyCommit 2024 - Secret Management made easy
Commit 2024 - Secret Management made easyAlfredo García Lavilla
 

Último (20)

Are Multi-Cloud and Serverless Good or Bad?
Are Multi-Cloud and Serverless Good or Bad?Are Multi-Cloud and Serverless Good or Bad?
Are Multi-Cloud and Serverless Good or Bad?
 
The Role of FIDO in a Cyber Secure Netherlands: FIDO Paris Seminar.pptx
The Role of FIDO in a Cyber Secure Netherlands: FIDO Paris Seminar.pptxThe Role of FIDO in a Cyber Secure Netherlands: FIDO Paris Seminar.pptx
The Role of FIDO in a Cyber Secure Netherlands: FIDO Paris Seminar.pptx
 
SIP trunking in Janus @ Kamailio World 2024
SIP trunking in Janus @ Kamailio World 2024SIP trunking in Janus @ Kamailio World 2024
SIP trunking in Janus @ Kamailio World 2024
 
WordPress Websites for Engineers: Elevate Your Brand
WordPress Websites for Engineers: Elevate Your BrandWordPress Websites for Engineers: Elevate Your Brand
WordPress Websites for Engineers: Elevate Your Brand
 
Unleash Your Potential - Namagunga Girls Coding Club
Unleash Your Potential - Namagunga Girls Coding ClubUnleash Your Potential - Namagunga Girls Coding Club
Unleash Your Potential - Namagunga Girls Coding Club
 
TrustArc Webinar - How to Build Consumer Trust Through Data Privacy
TrustArc Webinar - How to Build Consumer Trust Through Data PrivacyTrustArc Webinar - How to Build Consumer Trust Through Data Privacy
TrustArc Webinar - How to Build Consumer Trust Through Data Privacy
 
Moving Beyond Passwords: FIDO Paris Seminar.pdf
Moving Beyond Passwords: FIDO Paris Seminar.pdfMoving Beyond Passwords: FIDO Paris Seminar.pdf
Moving Beyond Passwords: FIDO Paris Seminar.pdf
 
From Family Reminiscence to Scholarly Archive .
From Family Reminiscence to Scholarly Archive .From Family Reminiscence to Scholarly Archive .
From Family Reminiscence to Scholarly Archive .
 
DevoxxFR 2024 Reproducible Builds with Apache Maven
DevoxxFR 2024 Reproducible Builds with Apache MavenDevoxxFR 2024 Reproducible Builds with Apache Maven
DevoxxFR 2024 Reproducible Builds with Apache Maven
 
DMCC Future of Trade Web3 - Special Edition
DMCC Future of Trade Web3 - Special EditionDMCC Future of Trade Web3 - Special Edition
DMCC Future of Trade Web3 - Special Edition
 
New from BookNet Canada for 2024: BNC CataList - Tech Forum 2024
New from BookNet Canada for 2024: BNC CataList - Tech Forum 2024New from BookNet Canada for 2024: BNC CataList - Tech Forum 2024
New from BookNet Canada for 2024: BNC CataList - Tech Forum 2024
 
Digital Identity is Under Attack: FIDO Paris Seminar.pptx
Digital Identity is Under Attack: FIDO Paris Seminar.pptxDigital Identity is Under Attack: FIDO Paris Seminar.pptx
Digital Identity is Under Attack: FIDO Paris Seminar.pptx
 
DSPy a system for AI to Write Prompts and Do Fine Tuning
DSPy a system for AI to Write Prompts and Do Fine TuningDSPy a system for AI to Write Prompts and Do Fine Tuning
DSPy a system for AI to Write Prompts and Do Fine Tuning
 
Take control of your SAP testing with UiPath Test Suite
Take control of your SAP testing with UiPath Test SuiteTake control of your SAP testing with UiPath Test Suite
Take control of your SAP testing with UiPath Test Suite
 
Transcript: New from BookNet Canada for 2024: BNC CataList - Tech Forum 2024
Transcript: New from BookNet Canada for 2024: BNC CataList - Tech Forum 2024Transcript: New from BookNet Canada for 2024: BNC CataList - Tech Forum 2024
Transcript: New from BookNet Canada for 2024: BNC CataList - Tech Forum 2024
 
How to write a Business Continuity Plan
How to write a Business Continuity PlanHow to write a Business Continuity Plan
How to write a Business Continuity Plan
 
The State of Passkeys with FIDO Alliance.pptx
The State of Passkeys with FIDO Alliance.pptxThe State of Passkeys with FIDO Alliance.pptx
The State of Passkeys with FIDO Alliance.pptx
 
The Ultimate Guide to Choosing WordPress Pros and Cons
The Ultimate Guide to Choosing WordPress Pros and ConsThe Ultimate Guide to Choosing WordPress Pros and Cons
The Ultimate Guide to Choosing WordPress Pros and Cons
 
TeamStation AI System Report LATAM IT Salaries 2024
TeamStation AI System Report LATAM IT Salaries 2024TeamStation AI System Report LATAM IT Salaries 2024
TeamStation AI System Report LATAM IT Salaries 2024
 
Commit 2024 - Secret Management made easy
Commit 2024 - Secret Management made easyCommit 2024 - Secret Management made easy
Commit 2024 - Secret Management made easy
 

Using the Cypress PSoC Processor

  • 1. Using the Cypress PSoC Processor January 15, 2011 Lloyd Moore President/Owner, CyberData Corporation
  • 2. Overview  Programmable Systems On Chip  Cypress Family  PSoC 3/5 Architectural Overview  Configurable Components  Development Environment  Cool Peripherals For Robotics  Best Practices  Resources
  • 3. Programmable Systems on Chip  Single chip contains:  Traditional processor  Traditional peripherals  CPLD/FPGA hardware  Analog hardware  Programmable analog hardware  Primary advantages are reduced part count, reduced cost, increased flexibility and increased reliability  Several now on the market  Actel SmartFusion  Xilinx  Cypress PSoC
  • 4. Cypress PSoC Family  PSoC 1  The original design  8 bit M8C core, 4 MIPS  Available since 2001  Power PSoC  Simple devices, for LED lighting and motor control  Have high current FETs on board (1A range)  PSoC 3  Redesign of development tool chain  Redesign of analog blocks  Enhanced 8051 core, 33 MIPS  Production parts available December 2010  PSoC 5  Same base architecture as PSoC 3 + 2 additional SAR ADCs  32 bit ARM Cortex M3 core, 100 Dhrystone MIPS  Sampling now, production parts Q2 2011  Will be talking only about the PSoC 3 & 5 today
  • 5. Cypress PSoC Family  Programmable in ‘C’ or assembly  ‘C’ is the default / recommended language  Low cost of entry  $50 to $250 for development kits  Development tools are a free download  PSoC Creator  PSoC Programmer  C – Compiler (Keil for PSoC3, GCC for PSoC5)  Good balance of processor, analog blocks and digital blocks  Single chip solution for many designs  Can start with the PSoC 3 and easily migrate to PSoC 5 when available / needed  Plan for this in your design to make it smooth  Only a recompile needed in many cases  CANNOT migrate to/from PSoC 1
  • 6. PSoC 3 & 5 Architecture
  • 7. Universal Digital Blocks  Each block contains 2 PLD blocks  The Datapath is a programmable ALU  8 bit single cycle ALU with shift and mask operations  2 Accumulators  2 Data registers  2 FIFO banks (4 bytes deep)  PLD usage can be decoupled from Datapath  Allows for more efficient resource mappings  Cross individual block boundaries  PLD and Datapath blocks can be chained for 16-32 bit operations
  • 8. UDB Uses  Counters  Timers  PWM  UART  Combinational discrete logic  Pseudo random number generator  Quadrature Encoder  CRC  Many, many others
  • 9. SC/CT Blocks  Basically an op-amp core with programmable resistors and capacitors attached  Used for building  More op-amps!, Programmable gain amplifiers  Transimpedance amps, Mixers  Sample and hold amplifiers
  • 10. Prebuilt Components  Hardware components normally combined to make what you need for your application  Large library of prebuilt components available  Each component consists of  Hardware specification (Graphical or VHDL)  Schematic symbol for graphical editor  ‘C’ API  Datasheet  Custom configuration dialog  Extensive abilities to also create your own components  VHDL or graphical design for hardware description  PDF for the datasheet  .NET for configuration dialog  Complete SDK in the tool chain for building these
  • 11. Development Environment  PSoC Creator – Full IDE  Pretty similar to Visual Studio or Eclipse  Hardware aspects programmed with a schematic capture style tool  Integrated programmer / debugger
  • 12. CapSense Module  Very flexible architecture  Individual buttons, matrix of buttons  Linear sliders, radial sliders  Full touch pads  Proximity sensors  Works with most materials, not just fingers!  Manual and automatic tuning  GUI tuning application to assist
  • 13. LCD Module  Modes:  Character  Graphic  Segment  Character LCD VERY helpful for debugging even if not needed for application  Very simple API, base data types supported  Can upgrade default LCD in dev kit  Lumex family of character displays, 4/8 bit parallel interface
  • 14. Boost Converter  Input from 0.5V to 5.5V  Allows for input from a solar cell / energy harvesting  Requires an external inductor, capacitor and optional diode  Source up to 30mA with internal diode, 50mA with external diode  Can also be used to form a regulated power supply not used by the processor
  • 15. Best Practices  Develop the hardware layer first  Will automatically generate API for you  Implement timing critical functions in hardware, complex functions in software  Use provided APIs and macros  Allows for component upgrades automatically  Allows for conversion of projects between PSoC3 and PSoC5 with minimal changes  Also different processors in the same family
  • 16. More Best Practices  Reserve and use “debug pins” to access internal signals  Keep digital and analog signals separate  Analog domain clocks available  Processor die split, orient this with board layout  Use dedicated pins for internal op-amps  Reduced silicon switch resistance  Buffer analog signals  Most internal sources have very minimal drive capability
  • 17. And MORE Best Practices  Watch for hardware race conditions  Use a higher frequency clock and “sequencer block” to control complex sequential logic  Many resets and presets require a clock cycle to take effect  May look like it works, but happening “by chance”  Read and know the items on the errata sheets!  Development tools can also adjust for errata items  Reserve time for experimentation  MANY ways to do things on this processor  Power of the processor comes from flexibility  Distinction between hardware and software largely gone  Combining hardware and software approach often the cleanest and simplest solution
  • 18. Summary  The PSoC processor integrates programmable analog and digital with a traditional processing core  The PSoC can be a one chip solution for many robotics projects  Develop the hardware configuration first and then develop the software, leaving time to experiment with different configurations
  • 19. Resources  PSoC Product Web Site:  http://www.cypress.com/?id=1353  PSoC Developer Community:  http://www.psocdeveloper.com/forums/  PSoC Training On Demand:  http://www.cypress.com/training  PSoC 5 FirstTouch Starter Kit: $50  http://www.cypress.com/?rID=43674  PSoC Full Development Kit (1, 3, 5): $249  http://www.cypress.com/?rID=37464  My Contact Info:  Lloyd@CyberData-Robotics.com  http://www.CyberData-Robotics.com
  • 20. Questions????  IDE demo if time  Will be around a bit after the meeting for individual questions  Feel free to e-mail me