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Ch 3 95

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Jecka Cortez
Jecka Cortez
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William Stallings Computer Organization and Architecture Chapter 3 System Buses
Program Concept ,[object Object],[object Object],[object Object]
What is a program? ,[object Object],[object Object],[object Object]
Function of Control Unit ,[object Object],[object Object],[object Object],[object Object]
Components ,[object Object],[object Object],[object Object],[object Object],[object Object]
Computer Components: Top Level View
Instruction Cycle ,[object Object],[object Object],[object Object]
Fetch Cycle ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Execute Cycle ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Example of Program Execution
Instruction Cycle - State Diagram
Interrupts ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Program Flow Control
Interrupt Cycle ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Instruction Cycle (with Interrupts) - State Diagram
Multiple Interrupts ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Multiple Interrupts - Sequential
Multiple Interrupts - Nested
Connecting ,[object Object],[object Object],[object Object],[object Object],[object Object]
Memory Connection ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Input/Output Connection(1) ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Input/Output Connection(2) ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
CPU Connection ,[object Object],[object Object],[object Object],[object Object]
Buses ,[object Object],[object Object],[object Object],[object Object]
What is a Bus? ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Data Bus ,[object Object],[object Object],[object Object],[object Object]
Address bus ,[object Object],[object Object],[object Object],[object Object]
Control Bus ,[object Object],[object Object],[object Object],[object Object]
Bus Interconnection Scheme
Big and Yellow? ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Single Bus Problems ,[object Object],[object Object],[object Object],[object Object],[object Object]
Traditional (ISA) (with cache)
High Performance Bus
Bus Types ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Bus Arbitration ,[object Object],[object Object],[object Object],[object Object]
Centralised Arbitration ,[object Object],[object Object],[object Object],[object Object]
Distributed Arbitration ,[object Object],[object Object]
Timing ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Synchronous Timing Diagram
Asynchronous Timing Diagram
PCI Bus ,[object Object],[object Object],[object Object],[object Object]
PCI Bus Lines (required) ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
PCI Bus Lines (Optional) ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
PCI Commands ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
PCI Read Timing Diagram
PCI Bus Arbitration
Foreground Reading ,[object Object],[object Object],[object Object],[object Object]

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Ch 3 95