SIMULATION OF
HALF AND FULL
ADDER
BY- ASHISH KUMAR (2K19/EE/062)
HARSH (2K19/EE/105)

CONTENT
• INTRODUCTION
• WHAT IS ADDER??
• TYPES OF ADDER
• SIMULATION
• DIFFERENCE BETWEEN TYPES OF ADDER
• REFERENCE

INTRODUCTION
In the combinational circuits, different logic
gates are used to design encoder, multiplexer,
decoder & de-multiplexer. These circuits have
some characteristics like the output of this
circuit mainly depends on the levels which are
there at input terminals at any time. This circuit
doesn’t include any memory. The earlier state of
the input doesn’t have any influence on the
current state of this circuit. The inputs and
outputs of a combinational circuit are ‘n’ no. of
inputs & ‘m’ no. of outputs. Some of the
combinational circuits are half adder and full
adder, subtractor, encoder, decoder, multiplexer,
and demultiplexer

An adder is a digital logic circuit in electronics that is extensively
used for the addition of numbers. In many computers and other
types of processors, adders are even used to calculate addresses and
related activities and calculate table indices in the ALU and even
utilized in other parts of the processors. These can be built for many
numerical representations like excess-3 or binary coded decimal.
Adders are basically classified into two types: Half Adder and Full
Adder
What is an Adder?

HALF ADDER IN DIGITAL LOGIC
• It adds two binary digits where the input bits are termed as augend and
addend and the result will be two outputs one is the sum and the other is
carry. To perform the sum operation, XOR is applied to both the inputs, and
AND gate is applied to both inputs to produce carry.

Let’s see an example of adding two single bits.
The 2-bit half adder truth table is as below:
0+0 = 0
0+1 = 1
1+0 = 1
1+1 = 10
• These are the least possible single-bit combinations. But the result for
1+1 is 10, the sum result must be re-written as a 2-bit output. Thus, the
equations can be written as:

0+0 = 00
0+1 = 01
1+0 = 01
1+1 = 10
• The output ‘1’of ‘10’ is carry-out. ‘SUM’ is the normal output and ‘CARRY’
is the carry-out.
• Now it has been cleared that a 1-bit adder can be easily implemented with
the help of the XOR Gate for the output ‘SUM’ and an AND Gate for the
‘Carry’.
Logical Expression:
Sum = A XOR B
Carry = A AND B
Implementation:

FULL ADDER IN DIGITAL LOGIC
• Full Adder is the adder which adds three
inputs and produces two outputs. The
first two inputs are A and B and the third
input is an input carry as C-IN. The
output carry is designated as C-OUT and
the normal output is designated as S
which is SUM.
• A full adder logic is designed in such a
manner that can take eight inputs
together to create a byte-wide adder and
cascade the carry bit from one adder to
the another.

The output carry is designated as C-OUT and the normal
output is represented as S which is ‘SUM’.
With the above full adder truth-table, the implementation
of a full adder circuit can be understood easily. The SUM
‘S’ is produced in two steps:
By XORing the provided inputs ‘A’ and ‘B’
The result of A XOR B is then XORed with the C-IN
This generates SUM and C-OUT is true only when either
two of three inputs are HIGH, then the C-OUT will be
HIGH. So, we can implement a full adder circuit with the
help of two half adder circuits. Initially, the half adder will
be used to add A and B to produce a partial Sum and a
second-half adder logic can be used to add C-IN to the
Sum produced by the first half adder to get the final S
output.

If any of the half adder logic produces a carry, there will be an output carry.
So, C-OUT will be an OR function of the half-adder Carry outputs. Take a look
at the implementation of the full adder circuit shown below.
Full Adder Logical Diagram

SIMULATION
We are using LTspice software to simulate half adder and full adder
We are using Ltspice software to simulate half adder and full adder.

MODEL OF HALF ADDER

OUTPUT OF HALF ADDER

MODEL OF FULL ADDER

OUTPUT OF FULL ADDER

DIFFERENCE BETWEEN HALF ADDER AND FULL
ADDER

S.no. HALF ADDER FULL ADDER
1)
Half Adder is combinational logic circuit
which adds two 1-bit digits. The half adder
produces a sum of the two inputs.
Full adder is combinational logical circuit that
performs an addition operation on three one-bit
binary numbers. The full adder produces a sum of
the three inputs and carry value.
2) Previous carry is not used. Previous carry is used.
3) In Half adder there are two input bits ( A, B). In full adder there are three input bits (A, B, C-in).
4)
Logical Expression for half adder is :
S=a⊕b ; C=a*b.
Logical Expression for Full adder is :
S=a⊕b⊕Cin; Cout=(a*b)+(Cin*(a⊕b)).
5)
It consists of one EX-OR gate and one AND
gate.
It consists of two EX-OR, two AND gate and one OR
gate.
6)
It is used in Calculators, computers, digital
measuring devices etc.
It is used in Multiple bit addition, digital processors
etc.

REFERENCE
• https://www.geeksforgeeks.org/half-adder-in-digital-logic/
• https://www.geeksforgeeks.org/full-adder-in-digital-
logic/#:~:text=Full%20Adder%20is%20the%20adder,as%20
S%20which%20is%20SUM.
• https://www.allaboutcircuits.com/technical-articles/basic-.
circuit-simulation-with-ltspice/

THANK YOU
