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Adders(half aders and full adder with explanation , truth table and circuit diagrams)

  1. HALF AND FULL ADDER D.C.Dharun Mughilan
  2. WHAT IS AN ADDER? An Adder is a device that can add two binary digits. It is a type of digital circuit that performs the operation of additions of two number. It is mainly designed for the addition of binary number, but they can be used in various other applications like binary code decimal, address decoding, table index calculation, etc. There are two types of Adder. One is Half Adder, and another one is known as Full Adder.
  3. Let us first take a look at the addition of single bits. 0 + 0 = 0 0 + 1 = 1 1 + 0 = 1 1 + 1 = 10 WHY WE NEED ADDERS?
  4. These are the least possible single bit combinations. But the result for 1 + 1 =10. This problem can be solved with the help of an EX-OR gate. The sum results can be re-written as a 2-bit output. Thus the above combination can be written as: 0 + 0 = 00 0 + 1 = 01 1 + 0 = 01 1 + 1 = 10 Here the output “1” of “10” becomes the carry-out. SUM is the normal output and the CARRY is the carry-out. For this purpose we are using adders.
  5. HALF ADDER  There are two inputs and two outputs in a Half Adder. Inputs are named as A and B, and the outputs are named as Sum (S) and Carry (C). The Sum is X-OR of the input A and B. Carry is AND of the input A and B. With the help of half adder, one can design a circuit that is capable of performing simple addition with the help of logic gates.
  6. THE HALF ADDER CIRCUIT: 
  7. TRUTH TABLE OF HALF ADDER INPUT OUTPUT A B SUM CARRY 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1
  8. From the truth table of the half adder we can see that the SUM (S) output is the result of the Exclusive-OR gate and the Carry- out (Cout) is the result of the AND gate. Then the Boolean expression for a half adder is as follows: For the SUM bit: 𝐴𝐵 + 𝐴𝐵 = 𝐴 𝑋𝑂𝑅 𝐵 = 𝐴⨁𝐵 For the CARRY bit: 𝐴 𝐴𝑁𝐷 𝐵 = 𝐴. 𝐵
  9. DISADVANTAGES OF HALF ADDER  One major disadvantage of the Half Adder circuit when used as a binary adder, is that there is no provision for a “Carry-in” from the previous circuit when adding together multiple data bits.  The half adder can add only two input bits (A and B) and has nothing to do with the carry if there is any in the input. So if the input to a half adder have a carry, then it will be neglected it and adds only the A and B bits.  One simple way to overcome this problem is to use a Full Adder type binary adder circuit.
  10. FULL ADDER The full adder is a little more difficult to implement than a half adder. The main difference between a half adder and a full adder is that the full-adder has three inputs and two outputs. The two inputs are A and B, and the third input is a carry input CIN. The output carry is designated as COUT, and the normal output is designated as S.
  11. The output S is an EX-OR between the input A and the half-adder SUM output B. The COUT will be true only if any of the two inputs out of the three are HIGH or at logic 1. Thus, a full adder circuit can be implemented with the help of two half adder circuits. The first half adder circuit will be used to add A and B to produce a partial sum. The second half adder logic can be used to add CIN to the sum produced by the first half adder circuit. Finally, the output S is obtained. If any of the half adder logic produces a carry, there will be an output carry. Thus, COUT will be an OR function of the half adder CARRY outputs.
  12. FULL ADDER CIRCUIT DIAGRAM
  13. INPUT OUTPUT A B C(IN) C(OUT) S 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 1 1 0 1 0 0 0 1 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1 TRUTH TABLE OF FULL ADDER A – INPUT A B – INPUT B C(IN) – CARRY IN C(OUT) – CARRY OUT S – SUM
  14. FULL ADDER CIRCUIT DIAGRAM
  15. From the truth table of the full adder we can see that the SUM (S) output is the result of the Exclusive-OR gate1 and Ex-OR gate 2 and the Carry-out (Cout) is the ORed result of the AND gate 1 and AND gate 2. Then the Boolean expression for a full adder is as follows: For the SUM bit: 𝐴 𝑋𝑂𝑅 𝐵 𝑋𝑂𝑅 𝐶𝐼𝑁 = 𝐴⨁𝐵⨁𝐶𝐼𝑁 For the CARRY OUT bit:
  16. HALF ADDER FULL ADDER Half Adder is combinational logic circuit which adds two 1-bit digits. The half adder produces a sum of the two inputs. Half Adder is combinational logic circuit which adds two 1-bit digits. The half adder produces a sum of the two inputs. Previous carry is not used. Previous carry is not used. In Half adder there are two input bits ( A, B). In full adder there are three input bits (A, B, C-in). Logical Expression for half adder is : S=A⊕B ; C=A.B. Logical Expression for Full adder is : S=A⊕B⊕Cin; Cout=(A.B)+(Cin*(A⊕B)). It consists of one EX-OR gate and one AND gate. It consists of two EX-OR, two AND gate and one OR gate. It is used in Calculators, computers, digital measuring devices etc. It is used in Multiple bit addition, digital processors etc. DIFFERENCE BETWEEN HALF ADDER & FULL ADDER
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