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TRANSISTOR TRANSISTOR LOGIC(TTL)
Submitted By Yogendra Yaduwanshi
7400 TTL Series
o TTL ICs first developed in 1965 and they are
known as “standard TTL” . This version of TTL
circuit is not available now.
o TTL family use only transistor to perform the basic
logic operations.
o The standard TTL is improved to a great extent
over the year.
o TTL devices are still used as “glue” logic which
connects more complex devices in digital system.
Two Input TTL-NAND Gate
 The first, let us replace transistor Q1 by its equivalent
circuits.
 A and B are the input terminals.
 The i/p voltage A and B can be either low (zero volts
ideally) or High (+Vcc ideally).
 A and B both low : If A and B both are connected to
ground, then both the B-E junction of the transistor
Q1 are forward biased.
Totem – pole Output Stage of TTL
 The arrangement of Q3 and Q4 on the output side of a
TTL NAND gate is called the totem-pole arrangement.
 In this circuit, the three output component Q3,Q4 and
diode D1 are stacked one on the top of the other in the
form of totem-pole. At any time, only one of them will
be conducting.
Digital Electronics - TTL (Transistor Transistor Logic)

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Digital Electronics - TTL (Transistor Transistor Logic)

  • 2. 7400 TTL Series o TTL ICs first developed in 1965 and they are known as “standard TTL” . This version of TTL circuit is not available now. o TTL family use only transistor to perform the basic logic operations. o The standard TTL is improved to a great extent over the year. o TTL devices are still used as “glue” logic which connects more complex devices in digital system.
  • 3. Two Input TTL-NAND Gate  The first, let us replace transistor Q1 by its equivalent circuits.  A and B are the input terminals.  The i/p voltage A and B can be either low (zero volts ideally) or High (+Vcc ideally).  A and B both low : If A and B both are connected to ground, then both the B-E junction of the transistor Q1 are forward biased.
  • 4. Totem – pole Output Stage of TTL  The arrangement of Q3 and Q4 on the output side of a TTL NAND gate is called the totem-pole arrangement.  In this circuit, the three output component Q3,Q4 and diode D1 are stacked one on the top of the other in the form of totem-pole. At any time, only one of them will be conducting.

Notas do Editor

  1. THANKS