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Once the critical cells are placed on the chip, it becomes necessary to surround the critical cells by decoupling capacitors. The placement of de-coupling capacitors surrounding the pre-placed cells improves the reliability and efficiency of the chip.
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Place decap
1. Floorplanning is basically the arrangement of logical blocks (i.e. multiplexer,
AND, OR gates, buffers) on silicon chip.
2. Floorplanning is basically the arrangement of logical blocks (i.e.
multiplexer, AND, OR gates, buffers) on silicon chip.
It is attained by following steps:
• Partition and synthesize larger designs into smaller modules
consisting of IP’s and std cells
3. Floorplanning is basically the arrangement of logical blocks (i.e.
multiplexer, AND, OR gates, buffers) on silicon chip.
It is attained by following steps:
• Define width and Height of ‘core’ and ‘Die’ using the physical area of
synthesized netlist, utilization factor and aspect ratio
4. Floorplanning is basically the arrangement of logical blocks (i.e.
multiplexer, AND, OR gates, buffers) on silicon chip.
It is attained by following steps:
• Define locations of pre-placed cells
5. Floorplanning is basically the arrangement of logical blocks (i.e.
multiplexer, AND, OR gates, buffers) on silicon chip.
It is attained by following steps:
• Place de-coupling capacitors surrounding pre-placed cells
6. Floorplanning is basically the arrangement of logical blocks (i.e.
multiplexer, AND, OR gates, buffers) on silicon chip.
It is attained by following steps:
• Power Planning
7. Floorplanning is basically the arrangement of logical blocks (i.e.
multiplexer, AND, OR gates, buffers) on silicon chip.
It is attained by following steps:
• IO Pin/Pad placement
8. • We have defined the Width and Height of the core.
• Also defined the locations of pre-placed cells
9. Block a Block b
Pre-placed
Cells
Block c
H
Die
Core
W
10. • We have defined the Width and Height of the core.
• Also defined the locations of pre-placed cells
• We need to encapsulate the Pre-placed Cells by Decoupling capacitor .
11. Decoupling capacitor encapsulate the Pre-placed Cells
• A decoupling capacitor is used to decouple
the pre-placed cells from main power
supply, in order to protect the cells from
the disturbance occurring in the power
distribution lines and source
• The purpose of using decoupling capacitors
is to deliver required current to the gates
during switching
3/2/2013 11
12. DECAP1
Block a Block b
Pre-placed
Cells
Block c
Die
Core
13. DECAP1
Block a Block b
Pre-placed
DECAP2
Cells
Block c
Die
Core
14. DECAP1
Block a Block b
Pre-placed
DECAP2
Cells
Block c
DECAP3
Die
Core
15. DECAP1
D
Block a Block b
4
Pre-placed
DECAP2
Cells
Block c
DECAP3
Die
Core