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Q4.11: NEON Intrinsics
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Resource: Q4.11 Name: NEON Intrinsics Date: 28-11-2011 Speaker: Michael Hope
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Q4.11: NEON Intrinsics
1.
Michael Hope, Toolchain bzr
branch lp:~michaelh1/+junk/intrinsics-demo NEON Intrinsics
2.
What's NEON? ●Ch 19
'Introducting NEON' http://infocenter.arm.com/help/topic/com.arm.doc.den0013a/
3.
SIMD is... Same instruction,
many values Anything involving signals is great for SIMD
4.
Normalisation
5.
● Easier to
read and write ● Easier (better?) register allocation ● Compiler knows how to schedule ● ABI neutral Advantages
6.
Works across compilers >
gcc-mcpu=cortex-a9 -mfpu=neon -O3 -c test.c > armcc --cpu Cortex-A9 --c99 -O3 -c test.c > clang -mcpu=cortex-a9 -mfpu=neon -O3 -c test.c
7.
Tune for the
architecture -mtune=cortex-a9 -mtune=cortex-a8 -mtune=cortex-a5
8.
SMS, unrolling, profiling?
9.
Writing
10.
Environment #include <arm_neon.h> gcc -march=armv7-a
-mfpu=neon
11.
Data types <type>x<lanes>_t (uint8x4_t) <type>x<lanes>x<#
registers>_t (int16x2x4_t)
12.
Some Instructions
13.
Add uint16x4_t vadd_u16 ( uint16x4_t
left, uint16x4_t right )
14.
Multiply uint64x2_t vmlal_u32 (uint64x2_t, uint32x2_t, uint32x2_t) int32x4_t
vqdmlal_s16 (int32x4_t, int16x4_t, int16x4_t)
15.
Strided load uint8x8x2_t vld2_u8 (const
uint8_t *) Form of expected instruction(s): vld2.8 {d0, d1}, [r0]
16.
Documentation GCC http://gcc.gnu.org/onlinedocs/gcc/ARM-NEON-Intrinsics.html ARM http://infocenter.arm.com/help/topic/com.arm.doc.den0013a Blog posts Search for
“Coding with NEON” on http://blogs.arm.com
17.
Writing
18.
Colour space conversion Y
= 0.2126 R + 0.7152 G + 0.0722 B HD television (ITU BT.709)
19.
Versions
20.
Nils Pipenbrinck http://hilbert-space.de/?p=22
21.
22.
23.
24.
Performance Plain C 48.481 s Assembly 8.727
s (5.55 x faster) Intrinsics 8.728 s (5.55 x faster)
25.
Bigger Routines “libpixelflinger: Add
ARM NEON optimized scanline_t32cb16” http://wiki.linaro.org/RichardSandiford/Sandbox/IntrinsicsPerformance Hand-written 2.831 s Intrinsics 2.637 s (7.4 % faster)
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