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第1回関西fpga・de0勉強会 コマンドラインでfpgaプロジェクト~quartus, sopc builder編~
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第1回関西fpga・de0勉強会 コマンドラインでfpgaプロジェクト~quartus, sopc builder編~
1.
コマンドラインでFPGAプロジェクト
~Quartus, SOPC Builder編~ ISE (@iseroid) 関西FPGA・DE0勉強会 20120519
2.
自己紹介 • ISE (@iseroid)
• XilinxのISEとは関係ないヨ • http://iseroid.blogspot.jp/ • 神戸在住・大阪勤務の組み込みエンジニア • 仕事で結構FPGA使ってます(Cyclone, Stratix, Spartan, Virtex) • キーワード • FPGA, Verilog, NiosII, Linux, Cygwin, Android, マイコン(PIC, AVR, H8, Cortex-M), ZigBee, USB, Ruby 関西FPGA・DE0勉強会 20120519
3.
プレゼン内容 FPGAプロジェクト (Altera, Verilog
& SOPC(NiosII)) について • コマンドラインの使いどころを紹介 • 全ての手順をコマンドラインで行うわけではないです • テスト(ModelSim)、実機デバッグ(SignalTapII, Content Editor)等は省 いてます 関西FPGA・DE0勉強会 20120519
4.
なぜコマンドライン? コマンドライン好きだから!
• Linux PCにSSH接続してVimやらMakeやら それはそれとして…… • GUIより合成とかが速い(気がする) • WindowsよりLinuxの方が合成とかが速い(気がする) USB こういう環境で開発できる LAN パワフルLinux PC 貧弱Win NotePC 関西FPGA・DE0勉強会 20120519
5.
コマンドラインってどこから使うの? • Windowsの場合
• スタートメニューの「NiosII Command Shell」 • 正体はQuartus同梱のCygwinのbash • Linuxの場合 • .../nios2eds/nios2_command_shell.sh • 普段tcsh派なんだけど仕方ない…… 関西FPGA・DE0勉強会 20120519
6.
前提の環境 ディレクトリ構造
階層構造 hw/ トップ階層(Verilog) • Quartus実行用 • .qps, .qsf, .sopc, .v サブモジュール Megacore bsp/ • BSPビルド用 • settings.bsp SOPC階層 fw/ NiosII On-Chip SOPC RAM Component • FWビルド用 • Makefile, .c, .h 関西FPGA・DE0勉強会 20120519
7.
まずはSOPC無し
Wizard サンプル MegaWiz 手書き (GUI) から ard .qpf, .qsf .v quartus_sh この形のが コマンドライン実行 .sof nios2-configure-sof 関西FPGA・DE0勉強会 20120519
8.
まずはSOPC無し • ともかく .qpf,
.qsf, .v等をhw/に準備 • 適宜GUIのQuartusやMegaWizard等を使って準備 • hw/$ quartus_sh --flow compile hoge • これで map, fit, sta, asm 一通りやってくれます • hw/$ nios2-configure-sof hoge.sof • JTAG経由でFPGAにprogramされる • quartus_pgmでもOK 関西FPGA・DE0勉強会 20120519
9.
SOPC階層(NiosII無し)を加える
SOPC Builder(GUI) .sopc sopc_builder .qpf, .qsf .v .v, etc.(SOPC) .sopcinfo quartus_sh .sof 関西FPGA・DE0勉強会 20120519
10.
SOPC階層(NiosII無し)を加える • GUIのSOPC Builderで構成を編集
• .sopcが生成されます • hw/$ sopc_builder --generate hoge.sopc • リポジトリから取り出した .sopcからgenerateする時とか便利 • LinuxでX Window System使えない環境だと動かないorz • Generateはjava, perl, make等がガチャガチャ動いているっぽい • KasperskyとCygwin相性悪い (速度低下) 関西FPGA・DE0勉強会 20120519
11.
NiosIIも加える
.sopcinfo settings.bsp eclipse nios2-bsp-generate- BSP files 生成 Makefile(BSP) HAL等 Makefile(FW) .c, .h FW make ビルド .elf 関西FPGA・DE0勉強会 20120519
12.
NiosIIも加える • とりあえず最初はNios用eclipseでBSP&FWプロジェクト作成
• BSPのsettings.bspとFWのMakefileを得る • bsp/$ nios2-bsp-generate-files --settings=settings.bsp --bsp-dir=. • SOPC構成の変更でBSP再生成時に便利 • fw/$ make download-elf • 先にsofをconfigureしておいて、FWをJTAG経由で転送 • fw/$ nios2-terminal • JTAG UARTのターミナル(先に起動しておくのがいい) 関西FPGA・DE0勉強会 20120519
13.
FWをOn-Chip RAMの初期値に
BSP Makefile(FW) .c, .h make .qpf, .qsf .hex .v .v, etc.(SOPC) quartsu_sh .sof 関西FPGA・DE0勉強会 20120519
14.
FWをOn-Chip RAMの初期値に • fw/$
make mem_init_install • fw/のMakefileにhw/への相対パス追記しておく QUARTUS_PROJECT_DIR = ../hw/ • hw/にhoge.hexがコピーされる • hw/$ quartus_sh --flow compile hoge • hoge.hexが織り込まれたsofができる • 別コマンドで再論理合成無しに実現できるかも? • SOFをprogramするだけでNiosIIのFW込みでシステム全体が動作開始 • もちろんpof化してフラッシュに焼いても有効 関西FPGA・DE0勉強会 20120519
15.
おまけ eclipseでもmake mem_init_installはできます • MakefileへのQUARTUS_PROJECT_DIR追記は必要 •
右クリック-[Make Targets]-[Build...] • ダイアログでmem_init_install選択して[Build] 関西FPGA・DE0勉強会 20120519
16.
まとめ • コマンドライン使うとちょっと幸せ
• GUIも適宜使いつつ…… • sopc_builder, nios2-bsp-generate-files, make, quartus_sh, nios2-configure-sof, nios2-terminal これらコマンドで一通りの作業ができる • バージョン管理の話に繋げたかったが、また次の機会に~ Let’s enjoy CUI! 関西FPGA・DE0勉強会 20120519
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