1. Presented By Abhinav Kumar Tyagi M.Tech II Year IIT Kharagpur Under the Guidance of Prof R V Raja Kumar E&ECE Department, IIT Kharagpur

4. SDR EXPLAINED Software Defined Radio Hardware Radio

5. IDEAL SDR Low Pass Filter Analog to Digital Converter Digital Signal Processor Antenna Block Diagram of Ideal SDR Receiver

9. MULTI MODE RADIO GSM Chipset CDMA chipset Processor Software Hardware Most of Mobile phone that work in more than one standards are based on this principle

12. WORK DONE

13. Architecture of RF Front End Digital to Analog Converter DAC5687 Baseband Processor Baseband Processor Analog to Digital Converter ADC08200 ADC08200 ADC8369 ADC8369 AD 8347 MGA665P8 TRF3761 FREQUENCY SYNTHESIZER I/Q MODULATOR TRF3703 MwT-17Q3 RF Front End Baseband Section Architecture of RF Front End Tx Ant Rx Ant

16. Direct Conversion Receiver LO frequency is equal to RF carrier frequency Converts RF signal to Zero frequency and hence called as Zero IF Receiver Simple Low Pass filter is used Image reject filter is not required Well suited for integration whole receiver ON-CHIP.

19. Study of TRF3761 Frequency Synthesizer Block Diagram

20. Application Schematic

21. Layout

22. Assembled Board Top and Bottom Side of Frequency synthesizer board with components mounted

31. LNA Input Two Signals at 935 & 935.2 MHZ, -25 dBm each.

32. Output of LNA The Intermodulation products are observed at 934.8 and 935.2 MHz

33. Output of Mixer

35. LNA Output F(MHz) P,dBm)

36. LNA Output (expanded) F(MHZ ) F(MHZ ) P,dBm) P,dBm)

37. Mixer Output 1 Down converted GSM Signal 2 Down converted WiFi Signal 1 2 3 Third Order Intermodulation Products of WiFi and LO 3 4 Third order intermodulation product of LO and GSM signal along with RF to IF leakage 4 5 RF to IF leakage of WiFi 5 6,7 Upconverted GSM and WiFi Signals 6 7