This application note guides you in choosing PSoC® devices and capacitive sensing methods for applications using PSoC CapSense technologies

1. CapSense™ Device and Method Selection Guide
AN14459
Author: Ryan Seguine
Associated Project: No
Associated Part Family: CY8C201xx , CY8C20x34, CY8C21x34, CY8C24x94
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Software Version: PSoC Designer™ 4.3 with EPCY8C20x34, EPCY8C24x94 and EPNUMv3
Associated Application Notes: AN2041, AN2209, AN2292
Application Note Abstract
This application note guides you in choosing PSoC® devices and capacitive sensing methods for applications using PSoC
™
CapSense technologies.
The CY8C21534-24PVXI is qualified for automotive
Introduction
applications. The CY8C20x34 is available in an extended
™
commercial range only. Both CY8C20x34 and CY8C21x34
Cypress offers the following four CapSense part families
support up to 28 capacitive sensors and the CY8C24x94
capable of performing capacitive to digital conversion:
supports up to 46 sensors.
 ™
CY8C201xx – CapSense Express
The CY8C201xx CapSense Express family supports IOs
 configurable as Capacitive sensing inputs or as GPIOs for
CY8C20x34
LED drive, interrupt output, wake-up on interrupt input and
 other digital IO functionalities. These products support
CY8C21x34
register based configuration through an I2C interface.
 CY8C24x94 Cypress offers the following CapSense development tools
for ease of use:
Table 1 displays a high level comparison of PSoC
CapSense devices.
 PSoC Designer IDE containing CapSense User
Parameters useful in determining the appropriate device Modules (UMs)
for an application include:
 PSoC Express with CapSense Integration
 Number of capacitive sensors
 CapSense Development Kits:
 Necessary supply voltage
 CY3218-CAPEXP1, CY3218-CAPEXP2, and
 CY3218-CAPEXP3 for CY8C201xx
Communication means
 CY3203A for CY8C20x34
 Non CapSense functionality required
 CY3213A for CY8C21x34
 Package size  CY3214 for CY8C24x94
 Programmability versus Configurability Development tools allow designers to adjust parameters
for each method pertaining to their application. These
Table 1. High Level Comparison of PSoC CapSense
parameters allow designers to configure the dynamic
Devices baseline control, harsh environment firmware
CY8C CY8C CY8C CY8C compensation, finger detection, slider and touchpad
Parameter
201xx 20x34 21x34 24x94
configuration, and external passive component pin
Additional selection.
Lowest High Higher Highest
Functionality
Power
Lowest Lowest Lower Low
Consumption
Package
Smallest Smallest Smaller Small
Sizes
Voltage Input
Lowest Lowest Lower Low
Range
March 18, 2008 Document No. 001-14459 Rev. *A 1
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2. AN14459
CapSense UMs utilize digital and analog resources. To
Device Selection utilize the additional functions listed, reconfiguration may
be required. This can be done either by using the Dynamic
Use Table 9. CapSense Device Parameters on page 6 in
Reconfiguration tool within the PSoC Designer Device
Appendix A to choose the appropriate device.
Editor, or referring to the appropriate technical reference
Many users prefer PSoC because it can perform multiple manual and manually configuring the needed registers
functions in a single device. Table 2 provides an overview within the application firmware.
of real time device functions (or user modules) supported
Many of the digital hardware functions can be recreated in
by the Cypress development tools within each CapSense
firmware. For example, to create a PWM, an internal clock
device family.
or timer’s interrupt can be configured to post periodically.
Table 2. User Modules for Each CapSense Device Family Within the interrupt, the port pins drive can be toggled to
achieve the desired frequency and duty cycle.
201xx
20x34
21x34
24x94
Function
CapSense devices also have important distinctions in
areas like system and CPU clocking and power supply
●
Full-Speed USB options as detailed in Table 3.
●
USB to UART Table 3. Device Clocking Overview
Communication
● ● ● ●
HW I2C Slave
Feature 201xx 20x34 21x34 24x94
● ●
HW I2C Master
6 or 12 6,12, or
System Clock 24 MHz
● ● ●
HW SPI M & S MHz 24 MHz
● ● Max CPU Speed
HW UART, RX, TX
12 MHz 24 MHz 24 MHz
at 4.75-5.25V
● ● ●
SW I2C N/A
Max CPU Speed
12 MHz 12 MHz 12 MHz
HW Counter/Timer 13- at 3.15-4.75V
8-32 bit 8-32 bit
bit
Max CPU Speed
3 MHz 3 MHz 3 MHz
HW Timer w/ Capture 8-32 bit 8-32 bit at 2.4-3.15V
Digital
HW PWM (with
8-32 bit 8-32 bit All CapSense devices have robust capacitive sensing
Deadband Option)
methods. Choose your device based on the application
Pseudo Random notes, and then decide the implementation method.
8-32 bit 8-32 bit
Sequencer
LED (Including 7-
● ● ●
Segment Support)
Miscellaneous
20x2 LCD Controller
● ● ●
Interface
● ● ●
E2PROM Emulation
● ● ●
I2C Bootloader
Full-Speed USB
●
Bootloader
ADC 8 and 7 to 13
10 bit bit
Analog / Mixed Signal
DAC 6, 8, and
9 bit
● ● ●
Comparators
Amplifiers
●
(Programmable Gain
and Instrumentation )
2-pole Band and Low
●
Pass Filter
CSR (Relaxation
● ●
CapSense
Oscillator)
● ●
CSD (Sigma Delta)
CSA (Successive
● ●
Approximation)
March 18, 2008 Document No. 001-14459 Rev. *A 2
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3. AN14459
Method Selection
Table 6. Method Performance in Harsh Environments
PSoC supports two capacitive sensing methods listed
here:
CSA CSA CSD CSD
External Stimulus
 201xx 20x34 21x34 24x94
Successive Approximation
Radiated RF
Excellent Excellent Excellent Excellent
 Immunity (1.9GHz)
Sigma-Delta Modulator
Radiated RF
Excellent Excellent Excellent Excellent
Each sensing methods has an associated PSoC Designer Immunity (800MHz)
UM to help designers configure the PSoC for the sensing
Radiated RF
method. They are: Excellent Excellent Excellent Excellent
Immunity (144MHz)
 CSA – CapSense with Successive Approximation Radiated RF
Excellent Excellent Excellent Excellent
Immunity (90kHz)
 CSD – CapSense with Sigma-Delta Modulator AC Conducted Mains
Excellent Excellent Excellent Excellent
Immunity (50/60Hz)
Table 4 lists the sensing methods supported by each
AC Conducted Noise
PSoC device. For details on the UM parameters, block
Good Good Good Good
Immunity (10kHz-
placement and usage, and application programming
1MHz)
interfaces (APIs), see the associated UM datasheets
Power Supply
contained within PSoC Designer. Excellent Excellent Excellent Excellent
Transient
Table 4. Available Methods for Each CapSense Device
GPIO Load Transient Excellent Excellent Excellent Excellent
Device CSD Method CSA Method ESD Air Discharge to
Horizontal Ground Excellent Excellent Excellent Excellent
●
CY8C201xx
Plane
●
CY8C20x34 ESD Contact
Excellent Excellent Excellent Excellent
Discharge to
●
CY8C21x34
CapSense Overlay
●
CY8C24x94
ESD Air Discharge to
Excellent Excellent Excellent Excellent
Exposed Ground Pin
Temperature
Note The CapSense with a Relaxation Oscillator (CSR) Good Good Excellent Excellent
Response
UM is not recommended for new designs. Contact your
local Cypress FAE for guidance or more details. Radiated RF
Excellent Excellent Excellent Excellent
Immunity (1.9GHz)
CSA and CSD are the recommended capacitive sensing
Radiated RF
methods. They perform extremely well in harsh and noisy Excellent Excellent Excellent Excellent
Immunity (800 MHz)
environments, require only minimal external passive
Radiated RF
components and are configurable for varying button sizes. Excellent Excellent Excellent Excellent
Immunity (144 MHz)
Table 5 provides an overview of the performance of each
Radiated RF
method in a typical application. Performance is influenced Excellent Excellent Excellent Excellent
Immunity (90 kHz)
by sensor layout, the overlay material and thickness, the
AC Conducted Mains
update rate, and resolution. Excellent Excellent Excellent Excellent
Immunity (50/60 Hz)
To validate the methods, Cypress has created a harsh AC Conducted Noise
environment performance specification. These tests Excellent Excellent Good Good
Immunity
evaluate how each method performs against various (10 kHz-1 MHz)
external stimuli. Relative comparisons of each method
Power Supply
based on the results of these tests are shown in Excellent Excellent Excellent Excellent
Transient
Table 6. GPIO Load Transient Excellent Excellent Excellent Excellent
ESD Air Discharge to
Table 5. Method Performance Excellent Excellent Excellent Excellent
Horizontal Ground
Plane
CSA CSA CSD CSD
Feature
ESD Contact
201xx 20x34 21x34 24x94
Excellent Excellent Excellent Excellent
Discharge to
Power CapSense Overlay
Excellent Excellent Excellent Excellent
Consumption
ESD Air Discharge to
Excellent Excellent Excellent Excellent
Typical SNR Exposed Ground Pin
Excellent Excellent Excellent Excellent
(1mm Overlay)
Temperature
Good Good Excellent Excellent
Typical SNR Response
Excellent Excellent Excellent Excellent
(3mm Overlay)
March 18, 2008 Document No. 001-14459 Rev. *A 3
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4. AN14459
Development CSA and CSD Differentiation
To develop a PSoC CapSense design, download and While CSA and CSD are both robust capacitive sensing
install the PSoC Designer or PSoC Express development methods, they differ in their applicability to certain designs.
tool. This section discusses similarities, drawbacks, and
advantages of the two sensing methods.
CapSense in PSoC Express
Both CSA and CSD create a switched capacitor circuit
PSoC Express brings the simplicity of block based design
using the sensing capacitor, switching it between a voltage
to microcontrollers. It is a useful tool that allows designers
rail and a measuring node. Because the clock has a 50%
unfamiliar with real time embedded systems to quickly
duty cycle, during half of the scan the sensing capacitor is
build a functional design. All CapSense methods are
connected to a voltage rail. This reduces the input
supported in this development tool.
impedance, reducing the amplitude of external noise seen
To use a PSoC CapSense sensor in the PSoC Express, in measurement data.
place the appropriate CapSense Sensor Inputs and the
The CSD circuit uses many of the available resources in
CapSense Properties Input. Similar to the Device Editor
the CY8C21x34 device. It uses the VC clocks, three digital
User Module properties, all relevant parameters are
blocks, one comparator, both comparator columns, and
configurable through the Properties Input.
the ADC PWM. Projects that require an ADC must re-
Support for CapSense Express devices is provided in the configure the CSD into an ADC and then back. The VC3
PSoC Express 3.0 software tool. This tool has various interrupt is unavailable for loop timing, unless the same
drivers to configure these devices. For details refer to the settings are used for VC clock settings and CSD. Another
application note CapSense Express Software Tool - way of doing this is; the extra digital block can be
AN42137. You can tune all CapSense related parameters configured as a timer or the low-speed 32 kHz oscillator
in real time to adjust sensitivity using this tool. (calibration is recommended if the 32 kHz oscillator is
used for this type of application).
CapSense in PSoC Designer
In the CY8C24x94 device, there is a hardware decimator,
PSoC Designer is an integrated development environment
and a comparator reference based on Vdd. This reduces
(IDE) complete with a debugger and application editor
resource consumption by one digital block and one analog
supporting C programming language and assembly
column. However, the VC clocks are still used.
language.
CSD has two features that CY8C20x34 does not possess.
PSoC Designer also includes an innovative device editor
First, it uses a pseudo-random clock for its switching clock
which allows users to configure PSoC for initialization and
as well as its measurement clock. This reduces all
to add prepackaged real time functions or user modules to
radiated emissions except for the main oscillator
PSoC projects.
frequency.
The PSoC CapSense UMs are placed using the device
Second, the CSD provides a means to output a clock at its
editor. After the UM is placed, sensors are assigned to
switching frequency. If this clock is connected to a shield
pins using the CapSense wizard. Set the parameters
sensor surrounding the actual sensor, the count output
governing the UM configuration. Table 7 lists the UM
from the CSD will differentiate between smaller non-
parameters.
grounded objects (like metal disks or water) and larger
Table 7. User Module Parameters Supported by Each grounded objects (like humans). Please see application
Method note AN2398, Waterproof Capacitive Sensing.
201xx
20x34
21x34
24x94
CSA
CSA
CSD
CSD
The CSA sensing method uses a non-linear approach to
Parameter
measure the change in capacitance. A small change in
capacitance produces an exponentially larger change in
● ● ● ●
Sensor Debounce
measurement counts. See Figure 1 on page 5 for a
● ● ● ●
ESD FW Detection comparison of the capacitance response for each method.
See Table 8 on page 5 for equations describing each
Finger-on Startup
● ● ● ● curve.
Recovery
● ● ● ● Note Unless waterproof sensing is required by the
Sensor Auto Reset
application, the device selection may be used to determine
Shield Sensor for Wet
● ● the appropriate sensing method.
Environments
Independent Finger
● ● ● ●
Thresholds for Buttons
Configurable Finger On
● ● ● ●
Hysteresis
● ●
Sensor Auto Calibration
Configurable Interpolated
● ● ● ●
Position
Touchpad Capability
● ● ●
(Multiple Sliders)
March 18, 2008 Document No. 001-14459 Rev. *A 4
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5. AN14459
Table 8. CapSense Response Linearity and Sensitivity
Equations
Linearity
Sensing Sensitivity/Resolution Max. CS
(Counts
Method (Farads/Count) (Farads)
vs. CS)
2
VREF FIMOCbus
I dacCS Non-
CSA
linear
I dac
I DAC Cbus FIMO
1
kd 1
1
CSD Linear
1)2 N RES
FS Rb ( 1 k d FS Rb
kd
Figure 1. Capacitive Response Method Comparison
7000
6000
5000
4000
Counts
3000
2000
1000
0
0 5 10 15 20 25
Added Capacitance (pF)
CSA CSD
Summary
When using PSoC for capacitive sensing, any of the four device families available provide a robust sensing method in CSA
and CSD. Choose your device, based on the package, feature set, and power needs you require. PSoC is not just a capacitive
sensing device; it is an ADC, a full-speed USB device, an LED pulse controller, a frequency counter and more.
March 18, 2008 Document No. 001-14459 Rev. *A 5
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6. AN14459
Appendix A: CapSense Device Parameters
Table 9. CapSense Device Parameters
CSA CSD Temp. CapSense
Part
Device Package IO RAM Flash
Family Sensors Sensors Range Vdd Range
CY8C20110-LDX2I 10 10 N/A Com-Ex 2.4-5.25 512 2K
16 QFN(3x3)
CY8C20110-LDX2I 10 10 N/A Com-Ex 2.4-5.25 512 2K
16 SOIC
CY8C20140-LDX2I 16 QFN(3x3) 4 4 N/A Com-Ex 2.4-5.25 512 2K
CY8C20140-SX2I 16 SOIC 4 4 N/A Com-Ex 2.4-5.25 512 2K
CY8C201xx
CY8C20142-SX1I 4 4 N/A Com-Ex 2.4-5.25 512 2K
8 SOIC
CY8C20160-LDX2I 6 6 N/A Com-Ex 2.4-5.25 512 2K
16 QFN(3x3)
CY8C20160-SX2I 6 6 N/A Com-Ex 2.4-5.25 512 2K
16 SOIC
CY8C20180-LDX2I 8 8 N/A Com-Ex 2.4-5.25 512 2K
16 QFN(3x3)
CY8C20180-SX2I 16 SOIC 8 8 N/A Com-Ex 2.4-5.25 512 2K
CY8C201A0-SX2I 16 SOIC 10 10 N/A Com-Ex 2.4-5.25 512 2K
CY8C20x34
CY8C20234-12LKX 16 QFN(3x3) 13 13 N/A Com-Ex 2.4-5.25 512 8K
CY8C20334-12LFXC 24 QFN(4x4) 20 20 N/A Com-Ex 2.4-5.25 512 8K
CY8C21634-24LFXI 32 QFN(5x5) 28 28 N/A Com-Ex 2.4-5.25 512 8K
CY8C21234-24SXI 16 SOIC 12 N/A 10 Ind 2.7-5.25 512 8K
CY8C21334-24PVXI 20 SSOP 16 N/A 14 Ind 2.7-5.25 512 8K
CY8C21x34
CY8C21534-24PVXI 28 SSOP 24 N/A 22 Ind 2.7-5.25 512 8K
CY8C21434-24LFXI 32 QFN(5x5) 28 N/A 26 Ind 2.7-5.25 512 8K
CY8C21634-24LFXI 32 QFN(5x5) 28 N/A 24 Ind 2.7-5.25 512 8K
CY8C21334-12PVXE 20 SSOP 16 N/A 14 Auto 4.75-5.25 512 8K
CY8C21534-12PVXE 28 SSOP 24 N/A 22 Auto 4.75-5.25 512 8K
CY8C24794-24LFXI 56 QFN(8x8) 50 N/A 46 Ind 3.0-5.25 1K 16K
CY8C24x94
CY8C24894-24LFXI 56 QFN(8x8) 49 N/A 45 Ind 3.0-5.25 1K 16K
CY8C24994-24LFXI 68 QFN(8x8) 56 N/A 46 Ind 3.0-5.25 1K 16K
100 VFBGA
CY8C24994-24BVXI 56 N/A 46 Ind 3.0-5.25 1K 16K
(6x6)
March 18, 2008 Document No. 001-14459 Rev. *A 6
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7. AN14459
About the Author
Name: Ryan Seguine
Title: Product Manager, Senior
Background: BS, University of Washington
Contact: capsense@cypress.com
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trademarks of Cypress Semiconductor Corp. All other trademarks or registered trademarks referenced herein are the property of their
respective owners.
Cypress Semiconductor
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San Jose, CA 95134-1709
Phone: 408-943-2600
Fax: 408-943-4730
http://www.cypress.com/
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March 18, 2008 Document No. 001-14459 Rev. *A 7
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