The document provides an overview of the Toshiba TMPA910 32-bit ARM-9 microcontroller, outlining its key features such as an LCD controller, CMOS image sensor interface, USB device support, I2C, SPI, and timers. It includes block diagrams of the memory map, JTAG interface, DMA controller, and peripheral interfaces. Additionally, it describes a starter kit for prototyping and evaluating the TMPA910 microcontroller.

4. Multi Layer BUS: Block Diagram

5. Memory Map of TMPA910CRA

8. Clock Mode Status Transition

10. Interrupts

11. DMA Block Diagram

12. DMA Controller Functions 2. Peripheral-to-Memory 1. Memory-to-peripheral 3. Memory-to-Memory

13. NAND-Flash Controller (NDFC)

14. 16-Bit Timers/PWM

15. UART Channel 0 Block Diagram

16. I2C Bus Mode • Contains two channels (ch0 and ch1). • Allows selection between master and slave. • Allows selection between transmission and reception. • Supports multiple masters (arbitration, clock synchronization recognition). • Supports standard mode and fast mode (fastest baud rate in master mode: 89.91 kHz and 357.14 KHz, respectively, at fPCLK = 100 MHz) • Supports transfer data sizes of 1 to 8 bits. • Provides one transfer complete interrupt. • Can enable or disable interrupts.

17. Block Diagram of SSP

18. Block Diagram of the USB Device Controller

19. I2S (Inter-IC Sound)

20. CMOS Image Sensor Interface (CMSI)

21. LCD Controller (LCDC) Block Diagram

22. Touch Screen Interface (TSI) External connection of TSI Internal block diagram of TSI