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PLPCB
What is PLPCB technology…..
•PLPCB (PowerLink Printed Circuit Boards) technology allows multiple copper
weights on the PCB for the Buss Bar Application.
“PowerLink”
“PowerLink” is defined as the use of 2 or more copper weights
on the same external layer of a printed wiring board.
What is Heavy / Extreme Copper……
•“Heavy Copper” is defined as any circuit with a copper weight in excess
of 4oz/ft2 on a printed circuit board.
“Extreme Copper” refers to 10oz/ft2 to 50oz/ft2 (.014” to .07”).
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Why use Heavy Copper?
Increased mechanical strength at connector sites and plated holes.
Increase in cross-sectional area of conductors without increasing trace
width or decreasing trace/trace spacing.
Higher current carrying capacity in traces AND in through holes or vias.
Use of high temperature dielectric materials to their full potential.
•PowerLink PCB can reduced:
In size reduction.
To protect circuit failure when it’s NOT an option
Reduce number of connectors w/PLPCB.
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Design Considerations
For Heavy Copper and “PowerLink”
circuits
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Board Size & Overall Layout
Board size is limited:
• 1-2 layers, max. board size is 16” x 22”
• 3-14 layers, max. board size is 16” x 22”
Board size is limited by process equipment
Symmetrical construction minimizes bow & twist
Balanced circuit density minimizes uneven plating
and prevents poor lamination (de-lam)
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Construction Stack-Up
Final Thickness is based on the heaviest
Copper weights.
• Copper thickness (1.4mil / oz)
• Final thickness tolerance is +/- 10%
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Holes & Interconnections
Maximum Copper thickness in the holes is depending
upon the size of the holes.
• Average 3mil of diameter for every oz. of Copper plated to
accommodate the heavy copper plating.
Minimum pad diameter :
= (oz Cu plated x 3) + required drill size + 10 mil
(internal or external layers).
•Minimum clearance diameter:
= (oz Cu plated x 3) + required drill size + 20 mil
(internal layers)
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Holes & Interconnections
• Vias can be plated shut as necessary.
• “PLPCB” requires 1 drill file per copper weight.
• Non supported holes (NPT with copper pad)
are not affected by heavy copper.
• Edge plating.
• Plated castellation.
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Current Carrying Capacity
A baseline method of SIZING CONDUCTORS:
• Current, temperature rise and cross-sectional area.
• Energy generated by the flow of electrical current
and the resulting power dissipation.
• Use of computer aided thermal analysis; this is due
to the multitude of factors affecting power dissipation.
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Current Carrying Capacity
Baseline Calculation
•External traces:
I = 0.025 X ΔT 0.45 X W 0.79 X Th 0.53
I= Current in Amps, ΔT = Temp. rise due to power loss,
•W= Trace width, Th= Trace thickness
•Internal traces should be derated by 50%
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Thermal Management
•Some variables to consider:
•• Environment (exposed to air, space, another gas)
•• Board material properties such as:
•• Thermal conductivity
•• Material density
•• Fluid velocities and viscosities
•• Thickness between layers/planes
•• Number of copper planes and their thickness
•• Number of plated vias, their diameter and Cu weight
•• Heat sources other then trace power loss.
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Methods of Heat Transfer
1) Conduction depends on:
- Copper planes and their thickness
2) Convection depends on:
- Fluid Temperature & Velocity, Forced or natural
3) Radiation depends on:
- Heat sources or sinks
Consider all three when optimizing a design
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“Built-In” Copper Heat-sinks
Dissipate heat away from the source
• By conduction and emit this heat to the
environment by convection.
• Use of Thermal Dielectric like “Thermal Clad” or
“T-Preg” in the heat sinks.
• Use of Heavy copper “Thermal” vias for the heat
transfer.
• Use of Heavy copper circuits to create “built-in”
copper heat-sinks.
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Why EI?
The power electronics industry is one of our focus group. We
have years of experience developing processes and
manufacturing heavy copper circuits. We have …
Aggressive R&D program
Unique manufacturing capabilities:
PLPCB (PowerLink PCB) with multi-copper weights
capabilities.
Heavy / Extreme copper tracks and vias.
Edge Plating & Plated Castellations.
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Production Capabilities
Layer count: 1 - 25
Overall board thickness: 5 - 250 mil
Smallest drilled holes size: 6 mil, (Pad to Hole size may limit heavy
copper, contact us for more detail.
Copper weights:
Outer-layers: up to 50 doz/ft2 (3.12 lbs./ft2)
Inner-layers: up to 8 oz/ft2, with standard processes & up to 90 oz w/special
processing.
•Dielectric Materials:
FR4, Polyimide, BT-epoxy, Cyanate, Ester, High Frequency laminates – other
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Production Capabilities
LPI Solder-mask :
• Green, Red, Black in semi-gloss.
Silkscreen Ink:
• LPI White ink (5 mil or larger features)
• Available in : white, black or yellow (8 mil or greater)
Final Finishes:
• Lead Free HASL Solder, HASL PbSn Solder, ENIG, OSP
Electrical testing:
• Net listed (with fixture), flying probe(fixtureless)
• Insulation Resistance and HI-POT testing
Production Lot traceability on all parts
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Conductor Width, Spacing and Thickness
• Trace sizing is determined by the current carrying capacity
required and the temperature rise permitted.
• Minimum trace thickness width limited by the
manufacturing process and/or voltage constraints.
• Maximum trace thickness is limited by the line width and/or
spacing.
• A circuit board trace, depending on its size and manufacturing
process, may not be rectangular in shape.
• Additive (plating) processes are preferred to subtractive (etching)
processes but are more expensive. Typical conductor
width/spacing/thickness tolerance is +/- 20%, although tighter
tolerance is achievable.
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