This document discusses minimizing customer returns by using user-defined fault models (UDFM) to target cell-internal defects. It presents state-of-the-art fault models that do not sufficiently target these defects and proposes a new cell-aware UDFM methodology. This involves analyzing cell layouts and simulations to map defects to specific cells and generate targeted test stimuli. Results from applying this approach to a 32nm processor show it detected over 800 defects missed by traditional tests, reducing defects per million.

1. Minimizing Customer Returns by
Using User-Defined Fault Models
Design for Test and Manufacturing Test
Evgeny Polyakov
Euro Application Engineer
Mentor Graphics
May 2, 2012 1

2. Introduction
• Analysis has shown that
many customer returns are
due to undetected cell-
internal faults
• State-of-the-art fault
models do not target cell-
vdd
internal defects sufficiently
D2 S1 D0S0 D1
Z
gnd
• A new method and new
How can
we do it? defect-oriented fault model
is needed
2 May 2, 2012 2

3. State-of-the-art Fault Models
• The Stuck-At model is known and • The N-Detect model targets every
used very widely. ATPG tools can fault multiple times. Big disadvantage
generate compact test patterns. The is the large amount of additional test
test is easy to implement patterns and as such high test costs
• The Transition model assumes gross
delays at library cell level. The ATPG • The Embedded-Multi-Detect (EMD)
needs to generate at least a two model is an N-Detect model without
cycle normal mode test sequence increasing the pattern count or test
costs
• The timing-aware and Path-Delay
model assumes smaller delays along • The Gate-Exhaustive model tests
critical paths. The ATPG needs to every gate/cell exhaustively. This
generate a pattern that will activate results into a very large amount of
the path and will propagate an edge
through it test patterns and as such into very
high test costs
3 May 2, 2012 3

4. User-Defined Fault Models
• Defines stimulus criteria for
fault detection
Truth Table for MUX2 • Stimulus criteria “manually”
Cell “MUX2” {
determined based on
Fault “Z1” { experience or test failures
test { StaticFault “Z”=1;Condition “D0”=0,“D1”=0,“S”=0;}
test { StaticFault “Z”=1;Condition “D0”=0,“D1”=1,“S”=0;}
test { StaticFault “Z”=1;Condition “D0”=0,“D1”=0,“S”=1;}
}
} • Leverages existing Fault
UDFM that offers test alternatives for fault detection Models (Stuck-at,
transition)
4 May 2, 2012 4

5. Gate Exhaustive UDFM
• A way to specify that all possible
stimulus combinations be used to
detect faults
Truth Table for MUX2
• Creates a larger test set
Cell “MUX2” {
Fault “SA_s0_00_Z” {test {StaticFault “Z”=1;Condition “D0”=0,“D1”=0,“S”=0;}}
Fault “SA_s0_01_Z” {test {StaticFault “Z”=1;Condition “D0”=0,“D1”=1,“S”=0;}}
…
Fault “SA_s1_11_Z” {test {StaticFault “Z”=0;Condition “D0”=1,“D1”=1,“S”=1;}}
// Transition
Fault “TR_s0_00_Z” {test {DelayFault “Z”=1;Condition “D0”=10,“D1”=00,“S”=00;}}
Fault “TR_s0_01_Z” {test {DelayFault “Z”=1;Condition “D0”=10,“D1”=11,“S”=00;}}
…
Fault “TR_s1_11_Z” {test {DelayFault “Z”=0;Condition “D0”=01,“D1”=11,“S”=11;}}
}
5 May 2, 2012 5

6. Cell-Aware UDFM
Layout
vdd • Map the layout related cell-
internal defects to the transistor-
Z
D2 S1 D0 S0 D1 level netlist
• Modify/sweep parameters to
gnd
determine effects of opens and
bridges
Transistor netlist • Generate stimulus that will detect
S0
P24 P38
P23 P34
S1N
P54
P48
the defects
P31 P63
• Generate the UDFM
Z
D2 N28 N63
D1
D0 S1
N23 N32 N41
S0N
N24 N33 N57
6 May 2, 2012 6

7. Cell-Aware Methodology
Library Characterization Flow
Layout Analog Fault Cell-Aware
Extraction Simulation Fault Model Reports
Generation
SPICE Defect
parasitics Matrix CAM
netlist Cell-Aware UDFM
defects
Model
7 May 2, 2012 7

8. UDFM Development
• Starting with GDS2 for each cell,
extract a SPICE netlist including
parasitics
• Perform SPICE simulations and
sweep the parasitic capacitor to
values from 1KΩ to 20KΩ to
model bridges
• Replace each parasitic resistor
with 1GΩ to model opens
• Compare fault-free simulation
results with fault injected
simulation results
8 May 2, 2012 8

9. UDFM At-Speed
• Transient analysis of SPICE
simulation is done at two time
frames exhaustively
• The lowest detectable cells are
complex cells (MUXs, AOs) and
cells with high drive strength
• Gross delay and small delay fault
models target different kinds of
bridge types
9 May 2, 2012 9

10. Cell-Aware: Identifying Potential
Defects
• A bridge between select S0 and data input D1 would typically not be
detected using traditional test generation
• Standard test generation would not assign a value to D1 when S0 is active
Mentor/AMD: “Cell-aware library characterization for advanced technology nodes and production
test results from a 32nm processor
F. Hapke, et al., 2012 DATE
10 May 2, 2012 10

11. Production Test Design
Core Core • AMD Notebook processor
• ~200mm2, 1.5B transistors
Core Core
• 4 Cores: 35M transistors/core
• Process: 32nm
GPU • 1MB L2 cache
• DDR3 Memory
Fault models • DirectX GPU / 822M transistors
• Stuck-At (Slow-Speed)
• Transition (At-speed ND5)
• Cell-Aware (Slow-speed)
• Cell-Aware(At-speed)
Mentor/AMD: “Cell-aware library characterization for advanced technology nodes and production”
test results from a 32nm processor (Presentation)
F. Hapke, et al., 2012 DATE
May 2, 2012 11

12. Production Test Flow
Mentor/AMD: “Cell-aware library characterization for advanced technology nodes and production
test results from a 32nm processor
F. Hapke, et al., 2012 DATE
12 May 2, 2012 12

13. Production Test Results
• 800K IC tested
total total
231 fails Total 699 fails = 885 PPM 609 fails
• Slow-speed cell-aware patterns detected
292 ppm 771 ppm 231 defects that the standard test
patterns did not detect
Slow-speed At-speed • Slow-speed cell-aware patterns reduced
DPM by 292
90 141 468
fails fails fails • At-speed cell-aware patterns detected 609
defects that the standard test patterns did
not detect
• At-speed cell-aware patterns reduced
DPM by 771
• Combining both cell-aware tests shows a
DPM reduction of 885
Mentor/AMD: “Cell-aware library characterization for advanced technology nodes and production
test results from a 32nm processor
F. Hapke, et al., 2012 DATE
13 May 2, 2012 13

14. Summary
• Cell-Aware UDFM provides targeted test coverage
for defects internal to cells
• Generating Cell-Aware UDFM is a straight-forward
exercise, and only has to be done once for each
library
• Significant results have already been seen in
production test and those results have been
published
14 May 2, 2012 14