SlideShare uma empresa Scribd logo
1 de 12
Main Memory & Memory
Addresses
Memory


A memory chip is used to store
all our data. A chip which is set
next to the CPU as it makes
direct contact with the CPU.
• Volotile - stores data temporarily, It
means that when the computer is
switched off, that particular data is
removed completely from the system.
E.g. RAM
• Non-volotile - stores data permanently,
it means that when the computer is
switched off all data remains stored in
the system. E.g. ROM
Difference between ROM &
RAM
What is Machine Code?


Machine code is the only form of program
instructions that the computer hardware
can understand and execute directly. All
other forms of computer language must be
translated into machine code in order to be
executed by the hardware. E.g. Assembly
language



Assembly language is a symbolic
representation of machine code, which
allows programmers to write programs in
machine code without having to deal with
the long binary strings.


Assembly Language is made up
of op-codes and operands
Instructions
in
assembly
language are rather simple
• An opcode is a single instruction that can be
executed by the CPU. In machine language it is
a binary or hexadecimal value such as 'b6'
loaded into the instruction register
e.g. Mov, add , jmp
•Operands are manipulated by the opcode.
MOV, AL, 34H
The operands are the register named AL and
the value 34 hex
Fetch-Decode-Execute
Cycle
THE FETCH – EXECUTE CYCLE
Both the data and the program that
acts upon that data are loaded into
main memory (RAM) by the operating
system. The CPU is now ready to do
some work.
Steps of the Fetch/Execute
Cycle:
• Get the next instruction
• Figure out what to do
• Gathering the data needed
to do it
• Do it
• Save the result, and
• Repeat (billions of
times/second)!
Fetch Cycle
• The Program Counter (PC) contains the address of
the next instruction to be fetched
• The address contained in the PC is copied to the
Memory Address Register (MAR).
• The instruction is copied from the memory location
contained in the MAR and placed in the Memory
Buffer Register (MBR).
• The entire instruction is copied from the MBR and
placed in the Current Instruction Register (CIR)
• The PC is incremented so that it points to the next
instruction to be fetched
Execute Cycle
• The address part of the instruction is
placed in the MAR
• The instruction
executed

is

decoded

and

• The processor checks for interrupts
(signals from devices or other sources
seeking the attention of the processor)
and either branches to the relevant
interrupt service routine or starts the
cycle again.
CU

100

101
100

PC

Program
Counter

IR

Multiply no.
Instruction
in 500, 501
Register

ALU
Acc Accumulator
378

Multiply no. in 500,501

101

Store result in 502

500

21

501

18

502

1.The PC contains the address of location 100
2.CU fetches instruction in location 100
3. Make a copy of the instruction into the IR
4. Increment the PC by 1
5. Activate the right circuits to execute the instruction
CU
PC

100

102
101

Program
Counter

Store result
Multiply no.
Instruction
IR
inin 502
500, 501
Register
ALU
Acc Accumulator
378

Multiply no. in 500,501

101

Store result in 502

500

21

501

18

502

378

1. The PC contains the address of location 101
2. CU fetches instruction in location 101
3. A copy of the instruction is saved in the IR
4. Increment the PC
5. Activate the right circuits to execute the instruction

Mais conteúdo relacionado

Mais procurados

Microprogram Control
Microprogram Control Microprogram Control
Microprogram Control
Anuj Modi
 
Input output organization
Input output organizationInput output organization
Input output organization
abdulugc
 
Introduction to Computer Architecture
Introduction to Computer ArchitectureIntroduction to Computer Architecture
Introduction to Computer Architecture
Ankush Srivastava
 
Fetch decode-execute presentation
Fetch decode-execute presentationFetch decode-execute presentation
Fetch decode-execute presentation
chantellemallia
 

Mais procurados (20)

Microprogram Control
Microprogram Control Microprogram Control
Microprogram Control
 
Basic Computer Organization and Design
Basic  Computer  Organization  and  DesignBasic  Computer  Organization  and  Design
Basic Computer Organization and Design
 
Processor organization & register organization
Processor organization & register organizationProcessor organization & register organization
Processor organization & register organization
 
Memory mapped I/O and Isolated I/O
Memory mapped I/O and Isolated I/OMemory mapped I/O and Isolated I/O
Memory mapped I/O and Isolated I/O
 
Parallel processing
Parallel processingParallel processing
Parallel processing
 
Input output organization
Input output organizationInput output organization
Input output organization
 
instruction format and addressing modes
instruction format and addressing modesinstruction format and addressing modes
instruction format and addressing modes
 
Stack in 8085 microprocessor
Stack in 8085 microprocessorStack in 8085 microprocessor
Stack in 8085 microprocessor
 
Instruction Execution Cycle
Instruction Execution CycleInstruction Execution Cycle
Instruction Execution Cycle
 
Introduction to Computer Architecture
Introduction to Computer ArchitectureIntroduction to Computer Architecture
Introduction to Computer Architecture
 
Multiprocessor
MultiprocessorMultiprocessor
Multiprocessor
 
Motorola microprocessor
Motorola microprocessorMotorola microprocessor
Motorola microprocessor
 
CS4109 Computer System Architecture
CS4109 Computer System ArchitectureCS4109 Computer System Architecture
CS4109 Computer System Architecture
 
COMPUTER ORGANIZATION AND ARCHITECTURE
COMPUTER ORGANIZATION AND ARCHITECTURECOMPUTER ORGANIZATION AND ARCHITECTURE
COMPUTER ORGANIZATION AND ARCHITECTURE
 
Chapter 8
Chapter 8Chapter 8
Chapter 8
 
Memory Organization
Memory OrganizationMemory Organization
Memory Organization
 
Interfacing LCD with 8051 Microcontroller
Interfacing LCD with 8051 MicrocontrollerInterfacing LCD with 8051 Microcontroller
Interfacing LCD with 8051 Microcontroller
 
Direct memory access
Direct memory accessDirect memory access
Direct memory access
 
Fetch decode-execute presentation
Fetch decode-execute presentationFetch decode-execute presentation
Fetch decode-execute presentation
 
Arbitration in computer organization
 Arbitration in computer organization   Arbitration in computer organization
Arbitration in computer organization
 

Destaque

Segments
SegmentsSegments
Segments
aviban
 
instruction cycle ppt
instruction cycle pptinstruction cycle ppt
instruction cycle ppt
sheetal singh
 
Basic Computer Organization and Design
Basic Computer Organization and DesignBasic Computer Organization and Design
Basic Computer Organization and Design
mekind
 

Destaque (20)

Instruction cycle
Instruction cycleInstruction cycle
Instruction cycle
 
Segments
SegmentsSegments
Segments
 
8086
80868086
8086
 
13.computer buses
13.computer buses13.computer buses
13.computer buses
 
Memory segmentation-of-8086
Memory segmentation-of-8086Memory segmentation-of-8086
Memory segmentation-of-8086
 
instruction cycle ppt
instruction cycle pptinstruction cycle ppt
instruction cycle ppt
 
Mother Board
Mother BoardMother Board
Mother Board
 
Expansion cards
Expansion cardsExpansion cards
Expansion cards
 
Introduction to CPU registers
Introduction to CPU registersIntroduction to CPU registers
Introduction to CPU registers
 
04. Computer Casing (Case, Housing)
04. Computer Casing (Case, Housing)04. Computer Casing (Case, Housing)
04. Computer Casing (Case, Housing)
 
External Cards and Slots
External Cards and SlotsExternal Cards and Slots
External Cards and Slots
 
Buses in a computer
Buses in a computerBuses in a computer
Buses in a computer
 
Mother board
Mother boardMother board
Mother board
 
Computer architecture
Computer architecture Computer architecture
Computer architecture
 
Addressing modes
Addressing modesAddressing modes
Addressing modes
 
Assembly Language Lecture 1
Assembly Language Lecture 1Assembly Language Lecture 1
Assembly Language Lecture 1
 
Basic Computer Organization and Design
Basic Computer Organization and DesignBasic Computer Organization and Design
Basic Computer Organization and Design
 
The Intel 8086 microprocessor
The Intel 8086 microprocessorThe Intel 8086 microprocessor
The Intel 8086 microprocessor
 
Paging and segmentation
Paging and segmentationPaging and segmentation
Paging and segmentation
 
ARM7-ARCHITECTURE
ARM7-ARCHITECTURE ARM7-ARCHITECTURE
ARM7-ARCHITECTURE
 

Semelhante a Memory & the fetch decode-execute cycle

Computer System Architecture - Computer System Architecture
Computer System Architecture - Computer System ArchitectureComputer System Architecture - Computer System Architecture
Computer System Architecture - Computer System Architecture
ssusera1e32a1
 

Semelhante a Memory & the fetch decode-execute cycle (20)

Computer System Architecture - Computer System Architecture
Computer System Architecture - Computer System ArchitectureComputer System Architecture - Computer System Architecture
Computer System Architecture - Computer System Architecture
 
Running a Program.pdf
Running a Program.pdfRunning a Program.pdf
Running a Program.pdf
 
Computer Organisation & Architecture (chapter 1)
Computer Organisation & Architecture (chapter 1) Computer Organisation & Architecture (chapter 1)
Computer Organisation & Architecture (chapter 1)
 
Cpu & its execution of instruction
Cpu & its execution of instructionCpu & its execution of instruction
Cpu & its execution of instruction
 
Computer Organization and Architechuture basics
Computer Organization and Architechuture basicsComputer Organization and Architechuture basics
Computer Organization and Architechuture basics
 
CAO.pptx
CAO.pptxCAO.pptx
CAO.pptx
 
Unit2fit
Unit2fitUnit2fit
Unit2fit
 
cpuorganisation-140723043011-phpapp02.pdf
cpuorganisation-140723043011-phpapp02.pdfcpuorganisation-140723043011-phpapp02.pdf
cpuorganisation-140723043011-phpapp02.pdf
 
Chapter1a
Chapter1aChapter1a
Chapter1a
 
Cpu
CpuCpu
Cpu
 
CPU.ppd
CPU.ppdCPU.ppd
CPU.ppd
 
Cpu organisation
Cpu organisationCpu organisation
Cpu organisation
 
Register
RegisterRegister
Register
 
The Basic Organization of Computers
The Basic Organization of ComputersThe Basic Organization of Computers
The Basic Organization of Computers
 
System Programming- Unit I
System Programming- Unit ISystem Programming- Unit I
System Programming- Unit I
 
E.s unit 4 and 5
E.s unit 4 and 5E.s unit 4 and 5
E.s unit 4 and 5
 
CPU Architecture
CPU ArchitectureCPU Architecture
CPU Architecture
 
Microprocessor systems (4)
Microprocessor systems (4)Microprocessor systems (4)
Microprocessor systems (4)
 
computer devices and memory unit 2 notes.pdf
computer devices and memory unit 2 notes.pdfcomputer devices and memory unit 2 notes.pdf
computer devices and memory unit 2 notes.pdf
 
Cpu and its execution statements
Cpu and its execution statementsCpu and its execution statements
Cpu and its execution statements
 

Último

Seal of Good Local Governance (SGLG) 2024Final.pptx
Seal of Good Local Governance (SGLG) 2024Final.pptxSeal of Good Local Governance (SGLG) 2024Final.pptx
Seal of Good Local Governance (SGLG) 2024Final.pptx
negromaestrong
 

Último (20)

PROCESS RECORDING FORMAT.docx
PROCESS      RECORDING        FORMAT.docxPROCESS      RECORDING        FORMAT.docx
PROCESS RECORDING FORMAT.docx
 
Ecological Succession. ( ECOSYSTEM, B. Pharmacy, 1st Year, Sem-II, Environmen...
Ecological Succession. ( ECOSYSTEM, B. Pharmacy, 1st Year, Sem-II, Environmen...Ecological Succession. ( ECOSYSTEM, B. Pharmacy, 1st Year, Sem-II, Environmen...
Ecological Succession. ( ECOSYSTEM, B. Pharmacy, 1st Year, Sem-II, Environmen...
 
Asian American Pacific Islander Month DDSD 2024.pptx
Asian American Pacific Islander Month DDSD 2024.pptxAsian American Pacific Islander Month DDSD 2024.pptx
Asian American Pacific Islander Month DDSD 2024.pptx
 
Web & Social Media Analytics Previous Year Question Paper.pdf
Web & Social Media Analytics Previous Year Question Paper.pdfWeb & Social Media Analytics Previous Year Question Paper.pdf
Web & Social Media Analytics Previous Year Question Paper.pdf
 
Unit-V; Pricing (Pharma Marketing Management).pptx
Unit-V; Pricing (Pharma Marketing Management).pptxUnit-V; Pricing (Pharma Marketing Management).pptx
Unit-V; Pricing (Pharma Marketing Management).pptx
 
Class 11th Physics NEET formula sheet pdf
Class 11th Physics NEET formula sheet pdfClass 11th Physics NEET formula sheet pdf
Class 11th Physics NEET formula sheet pdf
 
Z Score,T Score, Percential Rank and Box Plot Graph
Z Score,T Score, Percential Rank and Box Plot GraphZ Score,T Score, Percential Rank and Box Plot Graph
Z Score,T Score, Percential Rank and Box Plot Graph
 
Holdier Curriculum Vitae (April 2024).pdf
Holdier Curriculum Vitae (April 2024).pdfHoldier Curriculum Vitae (April 2024).pdf
Holdier Curriculum Vitae (April 2024).pdf
 
psychiatric nursing HISTORY COLLECTION .docx
psychiatric  nursing HISTORY  COLLECTION  .docxpsychiatric  nursing HISTORY  COLLECTION  .docx
psychiatric nursing HISTORY COLLECTION .docx
 
Food Chain and Food Web (Ecosystem) EVS, B. Pharmacy 1st Year, Sem-II
Food Chain and Food Web (Ecosystem) EVS, B. Pharmacy 1st Year, Sem-IIFood Chain and Food Web (Ecosystem) EVS, B. Pharmacy 1st Year, Sem-II
Food Chain and Food Web (Ecosystem) EVS, B. Pharmacy 1st Year, Sem-II
 
ICT role in 21st century education and it's challenges.
ICT role in 21st century education and it's challenges.ICT role in 21st century education and it's challenges.
ICT role in 21st century education and it's challenges.
 
On National Teacher Day, meet the 2024-25 Kenan Fellows
On National Teacher Day, meet the 2024-25 Kenan FellowsOn National Teacher Day, meet the 2024-25 Kenan Fellows
On National Teacher Day, meet the 2024-25 Kenan Fellows
 
INDIA QUIZ 2024 RLAC DELHI UNIVERSITY.pptx
INDIA QUIZ 2024 RLAC DELHI UNIVERSITY.pptxINDIA QUIZ 2024 RLAC DELHI UNIVERSITY.pptx
INDIA QUIZ 2024 RLAC DELHI UNIVERSITY.pptx
 
Seal of Good Local Governance (SGLG) 2024Final.pptx
Seal of Good Local Governance (SGLG) 2024Final.pptxSeal of Good Local Governance (SGLG) 2024Final.pptx
Seal of Good Local Governance (SGLG) 2024Final.pptx
 
General Principles of Intellectual Property: Concepts of Intellectual Proper...
General Principles of Intellectual Property: Concepts of Intellectual  Proper...General Principles of Intellectual Property: Concepts of Intellectual  Proper...
General Principles of Intellectual Property: Concepts of Intellectual Proper...
 
Unit-IV; Professional Sales Representative (PSR).pptx
Unit-IV; Professional Sales Representative (PSR).pptxUnit-IV; Professional Sales Representative (PSR).pptx
Unit-IV; Professional Sales Representative (PSR).pptx
 
Sociology 101 Demonstration of Learning Exhibit
Sociology 101 Demonstration of Learning ExhibitSociology 101 Demonstration of Learning Exhibit
Sociology 101 Demonstration of Learning Exhibit
 
This PowerPoint helps students to consider the concept of infinity.
This PowerPoint helps students to consider the concept of infinity.This PowerPoint helps students to consider the concept of infinity.
This PowerPoint helps students to consider the concept of infinity.
 
Unit-IV- Pharma. Marketing Channels.pptx
Unit-IV- Pharma. Marketing Channels.pptxUnit-IV- Pharma. Marketing Channels.pptx
Unit-IV- Pharma. Marketing Channels.pptx
 
TỔNG ÔN TẬP THI VÀO LỚP 10 MÔN TIẾNG ANH NĂM HỌC 2023 - 2024 CÓ ĐÁP ÁN (NGỮ Â...
TỔNG ÔN TẬP THI VÀO LỚP 10 MÔN TIẾNG ANH NĂM HỌC 2023 - 2024 CÓ ĐÁP ÁN (NGỮ Â...TỔNG ÔN TẬP THI VÀO LỚP 10 MÔN TIẾNG ANH NĂM HỌC 2023 - 2024 CÓ ĐÁP ÁN (NGỮ Â...
TỔNG ÔN TẬP THI VÀO LỚP 10 MÔN TIẾNG ANH NĂM HỌC 2023 - 2024 CÓ ĐÁP ÁN (NGỮ Â...
 

Memory & the fetch decode-execute cycle

  • 1. Main Memory & Memory Addresses
  • 2. Memory  A memory chip is used to store all our data. A chip which is set next to the CPU as it makes direct contact with the CPU. • Volotile - stores data temporarily, It means that when the computer is switched off, that particular data is removed completely from the system. E.g. RAM • Non-volotile - stores data permanently, it means that when the computer is switched off all data remains stored in the system. E.g. ROM
  • 4. What is Machine Code?  Machine code is the only form of program instructions that the computer hardware can understand and execute directly. All other forms of computer language must be translated into machine code in order to be executed by the hardware. E.g. Assembly language  Assembly language is a symbolic representation of machine code, which allows programmers to write programs in machine code without having to deal with the long binary strings.
  • 5.  Assembly Language is made up of op-codes and operands Instructions in assembly language are rather simple • An opcode is a single instruction that can be executed by the CPU. In machine language it is a binary or hexadecimal value such as 'b6' loaded into the instruction register e.g. Mov, add , jmp •Operands are manipulated by the opcode. MOV, AL, 34H The operands are the register named AL and the value 34 hex
  • 7. THE FETCH – EXECUTE CYCLE Both the data and the program that acts upon that data are loaded into main memory (RAM) by the operating system. The CPU is now ready to do some work.
  • 8. Steps of the Fetch/Execute Cycle: • Get the next instruction • Figure out what to do • Gathering the data needed to do it • Do it • Save the result, and • Repeat (billions of times/second)!
  • 9. Fetch Cycle • The Program Counter (PC) contains the address of the next instruction to be fetched • The address contained in the PC is copied to the Memory Address Register (MAR). • The instruction is copied from the memory location contained in the MAR and placed in the Memory Buffer Register (MBR). • The entire instruction is copied from the MBR and placed in the Current Instruction Register (CIR) • The PC is incremented so that it points to the next instruction to be fetched
  • 10. Execute Cycle • The address part of the instruction is placed in the MAR • The instruction executed is decoded and • The processor checks for interrupts (signals from devices or other sources seeking the attention of the processor) and either branches to the relevant interrupt service routine or starts the cycle again.
  • 11. CU 100 101 100 PC Program Counter IR Multiply no. Instruction in 500, 501 Register ALU Acc Accumulator 378 Multiply no. in 500,501 101 Store result in 502 500 21 501 18 502 1.The PC contains the address of location 100 2.CU fetches instruction in location 100 3. Make a copy of the instruction into the IR 4. Increment the PC by 1 5. Activate the right circuits to execute the instruction
  • 12. CU PC 100 102 101 Program Counter Store result Multiply no. Instruction IR inin 502 500, 501 Register ALU Acc Accumulator 378 Multiply no. in 500,501 101 Store result in 502 500 21 501 18 502 378 1. The PC contains the address of location 101 2. CU fetches instruction in location 101 3. A copy of the instruction is saved in the IR 4. Increment the PC 5. Activate the right circuits to execute the instruction