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Chapter 2 - Computer Evolution and Performance

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William Stallings Computer Organization and Architecture

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William Stallings Computer Organization and Architecture Chapter 2 Computer Evolution and Performance
ENIAC - background ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
ENIAC - details ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
von Neumann/Turing ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Structure of von Nuemann machine Main Memory Arithmetic and Logic Unit Program Control Unit Input Output Equipment
IAS - details ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Structure of IAS - detail Main Memory Arithmetic and Logic Unit Program Control Unit Input Output Equipment MBR Arithmetic & Logic Circuits MQ Accumulator MAR Control Circuits IBR IR PC Address Instructions & Data Central Processing Unit
Commercial Computers ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
IBM ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Transistors ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Transistor Based Computers ,[object Object],[object Object],[object Object],[object Object],[object Object]
Microelectronics ,[object Object],[object Object],[object Object],[object Object]
Generations of Computer ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Moore’s Law ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Growth in CPU Transistor Count
IBM 360 series ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
DEC PDP-8 ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
DEC - PDP-8 Bus Structure OMNIBUS Console Controller CPU Main Memory I/O Module I/O Module
Semiconductor Memory ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Intel ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Speeding it up ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Performance Mismatch ,[object Object],[object Object],[object Object]
DRAM and Processor Characteristics
Trends in DRAM use
Solutions ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Internet Resources ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]

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Chapter 2 - Computer Evolution and Performance

  • 1. William Stallings Computer Organization and Architecture Chapter 2 Computer Evolution and Performance
  • 2.
  • 3.
  • 4.
  • 5. Structure of von Nuemann machine Main Memory Arithmetic and Logic Unit Program Control Unit Input Output Equipment
  • 6.
  • 7. Structure of IAS - detail Main Memory Arithmetic and Logic Unit Program Control Unit Input Output Equipment MBR Arithmetic & Logic Circuits MQ Accumulator MAR Control Circuits IBR IR PC Address Instructions & Data Central Processing Unit
  • 8.
  • 9.
  • 10.
  • 11.
  • 12.
  • 13.
  • 14.
  • 15. Growth in CPU Transistor Count
  • 16.
  • 17.
  • 18. DEC - PDP-8 Bus Structure OMNIBUS Console Controller CPU Main Memory I/O Module I/O Module
  • 19.
  • 20.
  • 21.
  • 22.
  • 23. DRAM and Processor Characteristics
  • 25.
  • 26.