The document discusses self-awareness at the hardware/software interface. It describes how reconfigurable hardware allows the adaptation of hardware at runtime. The EPiCS approach uses proprioceptive computing to enable compute nodes to adapt to changing system states through self-awareness and self-expression at the hardware/software interface. This involves using multithreading as a unified programming model for heterogeneous multi-cores consisting of CPU, FPGA, and monitoring cores.

1. Self-Awareness at the
Hardware/Software Interface
Marco Platzner, University of Paderborn

2. Overview
• The hardware/software interface
– reconfigurable hardware
– computing elements design space
• The EPiCS approach
– self-awareness at the hardware/software interface
– hardware/software multithreading and heterogeneous multi-cores
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Self-awareness at the Hardware/Software Interface | Marco Platzner | December 2, 2011

3. Classic View on Hardware and Software
high-level language
assembly language
software
operating system
instruction set architecture
micro architecture
hardware
logic
transistors
geometry
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Self-awareness at the Hardware/Software Interface | Marco Platzner | December 2, 2011

4. Soft Hardware
high-level language
assembly language reconfigurable
hardware
operating system
instruction set architecture
micro architecture
logic
transistors
geometry
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Self-awareness at the Hardware/Software Interface | Marco Platzner | December 2, 2011

5. Reconfigurable Hardware Devices
• Programmable logic blocks and programmable interconnect
• fine-grained (bit-oriented)
– Field-programmable Gate Arrays (FPGAs)
– lookup tables, flip-flops
LUT FF
LUT
LUT FF
ALU REG
SHIFT
REG
• coarse-grained (word-oriented)
– ALUs, functional units
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Self-awareness at the Hardware/Software Interface | Marco Platzner | December 2, 2011

6. Computing Element Design Space
flexibility
general-purpose
processor
reconfigurable
hardware
domain-specific
programmable processor
application-
specific processor
application-specific
hardware (ASIC)
fixed function
specialization
performance
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Self-awareness at the Hardware/Software Interface | Marco Platzner | December 2, 2011

7. Overview
• The hardware/software interface
– reconfigurable hardware
– computing elements design space
• The EPiCS approach
– self-awareness at the hardware/software interface
– hardware/software multithreading and heterogeneous multi-cores
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Self-awareness at the Hardware/Software Interface | Marco Platzner | December 2, 2011

8. The EPiCS Approach (www.epics-project.eu)
• EPiCS studies proprioceptive computing systems
– proprioceptive = self-aware + self-expressive
– self-aware: learn and maintain knowledge about internal state &
environment
– self-expressive: determine actions based on goals, values, constraints
• EPiCS looks at several levels of systems
– compute node level (hw/sw interface)
– network level
– application level
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Self-awareness at the Hardware/Software Interface | Marco Platzner | December 2, 2011

9. Proprioception at the Hw/Sw Interface
• Self-awareness: Knowledge about internal state & environment
– utilization of resources, e.g. cores, interconnect, memories, I/O
– temperature distribution, failing components
– changing applications, workloads, quality of service constraints
• Self-expression: Actions based on goals, values, constraints
– assignment and migration of computations
– thermal and power management, fault detection and recovery
– hardware reconfiguration
• Enable compute nodes to autonomously optimize at runtime
– performance
– resource usage
– energy-efficiency
– reliability
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Self-awareness at the Hardware/Software Interface | Marco Platzner | December 2, 2011

10. Hardware/Software Multithreading
• Multithreading
– applications are partitioned into threads
– threads synchronize and communicate using abstractions provided by the
operating system (e.g. semaphores, message boxes)
sw sw sw sw
thread thread thread thread
sw hw
thread thread
operating system operating system
• Multithreading as a unified programming and execution
model for software and hardware
– circuits are turned into hardware threads
– eases programming and porting
– allows for migrating between software and hardware
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Self-awareness at the Hardware/Software Interface | Marco Platzner | December 2, 2011

11. Heterogeneous Multi-Cores
applications, quality of
service requirements,
system state
CPU core CPU core CPU core
(hardcore) (softcore) (softcore)
sw sw sw
thread thread thread
novel OS layer novel OS layer novel OS layer
interconnect
novel OS layer novel OS layer
monitoring core
hw hw
thread thread (proprioceptive
sensors)
reconfigurable reconfigurable
hardware core hardware core
thread assignment & migration,
hardware reconfiguration,
power & thermal management
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Self-awareness at the Hardware/Software Interface | Marco Platzner | December 2, 2011

12. ReconOS
• Our operating system for heterogeneous multi-cores
– leverages eCos and Linux operating systems
– uses Xilinx FPGA technology (PowerPC and Blaze CPUs)
– dynamic reconfiguration of hardware cores
• ReconOS is open source and available for download
– source code, tool chain, reference designs
– documentation, tutorials
– mailing lists
http://github.com/epics/reconos
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Self-awareness at the Hardware/Software Interface | Marco Platzner | December 2, 2011

14. Summary
• The hw/sw interface has shifted. Reconfigurable hardware
allows us to adapt the hardware at runtime.
• Proprioception (self-awareness/expression) at the compute
node level enables us to adapt to changing system states and
environments.
• EPiCS uses multithreading as unified programming and
execution model for heterogeneous multi-cores.
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Self-awareness at the Hardware/Software Interface | Marco Platzner | December 2, 2011

15. Further Reading
• Reconfigurable hardware and computing
[1] Katherine Compton and Scott Hauck. Reconfigurable Computing: A Survey of
Systems and Software. In ACM Computing Surveys, 34(2):171-210.
[2] Journals: ACM Transactions on Reconfigurable Technology and Systems.
Hindawi International Journal of Reconfigurable Computing.
• Self-awareness/expression in computing systems
[3] R. Lewis, A. Chandra, S. Parsons, E. Robinson, K. Glette, R. Bahsoon, J. Torresen,
and X. Yao. A survey of self-awareness and its application in computing systems.
In Proc. Int. Conference on Self-Adaptive & Self-Organizing Systems (SASO), 2011.
• Heterogeneous multi-cores
[4] Enno Lübbers and Marco Platzner. ReconOS: Multithreaded Programming for
Reconfigurable Computers. ACM Transactions on Embedded Computing Systems.
9(1):1-33, 2009.
[5] Markus Happe, Enno Lübbers and Marco Platzner. A Self-adaptive Heterogeneous
Multi-core Architecture for Embedded Real-time Video Object Tracking. In
International Journal of Real-Time Image Processing, 2011, Springer Berlin/
Heidelberg.
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Self-awareness at the Hardware/Software Interface | Marco Platzner | December 2, 2011

16. Thanks for Your
Interest!
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Self-awareness at the Hardware/Software Interface | Marco Platzner | December 2, 2011