Dynamic Shift Frequency Scaling Of ATPG Patterns

Dynamic Shift Frequency Scaling of ATPG Patterns ,[object Object],[object Object]

Agenda ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]

[object Object],[object Object],[object Object],[object Object],Introduction 130NM and above 90NM and below Stuck-at Transition Path-Delay Bridging Stuck-at

Background Test Time Reduction ,[object Object],ATPG Test Time ≈ ( # of Patterns x Length ) / Frequency Pattern Compression Adaptive Scan More Scan Chains Increase!

[object Object],TIMING POWER Scan Shift Setup Timing Last Shift Launch Methodologies Dynamic Power Dissipation! Power ~ Switching Activity Power ~ Frequency Increased Switching -> Lower Frequency Background Shift Frequency

Background Solution ,[object Object],[object Object],[object Object],[object Object]

Background Sample Power Analysis ,[object Object],Leakage Dynamic

Background Solution ,[object Object],[object Object],[object Object],[object Object],Solution Speed up low-power patterns

Scan Shift Power Analysis Flow ,[object Object],Simulation Create Saif Power Analysis Testbench Netlist VCD Saif Libraries - Synopsys VCS - Serial Patterns - vcd2saif - Per-Pattern saif - PrimePower - Saif-based flow

Optimal Shift Frequencies Step #1 ,[object Object],SHIFT POWER <= FUNCTIONAL POWER Pdyn(new) + Plek <= Pfunc Pdyn(new) <= Pfunc - Plek Pdyn(old) * Fshift(new) <= (Pfunc – Plek) --------------------------------- Fshift(old) Max Power Minimum Shift Frequency Min Power Maximum Shift Frequency

Optimal Shift Frequencies Step #1 Results ,[object Object],SHIFT POWER <= FUNCTIONAL POWER 0.01102W * Fmin <= ( 0.032W – 8.3e-4W ) ---------------------- 10MHZ 0.0048W * Fmax <= (0.032W – 8.3e-4W) ---------------------- 10MHZ Fmin = 28MHZ Fmax = 65MHZ

Optimal Shift Frequencies Step #2 ,[object Object],Fmin <= {F1, F2.., Fn} <= Fmax Reduces Complexity! For The Test Design: {28MHZ, 37MHZ, 52MHZ, 63MHZ} {35ns, 27ns, 19ns, 16ns}

Optimal Shift Frequencies Step #3 ,[object Object],Foreach Pattern: Assign Maximum Fi from {F1,F2,..Fn} such that: Pshift(Fi) <= Pfunc

Optimal Shift Frequencies Step #3 Results ,[object Object],Shift Frequency Allocation (Test Design) TOTAL PATTERNS 701 28MHZ 8 37MHZ 54 52MHZ 477 63MHZ 159

Generation of Patterns ,[object Object],[object Object],[object Object]

Creation of STIL File ,[object Object],[object Object],[object Object],load_unload" { W "_default_WFT_"; C { ... } Shift { V { "_clk" = ...; "_si" = #; "_so" = #; } } ... } load_unload" { W "_default_WFT_"; C { ... } Shift { W "_SlowShift_WFT_"; V { "_clk" = ...; "_si" = #; "_so" = #; } } ... }

Generation of WGL ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]

Generation of WGL Example { pattern 1 parallel_clock basic_scan } { load_unload } vector("_default_WFT_") := [ 1 0 0.... ]; scan("_SlowShift_WFT_") := [ 1 1 0.... ], ..... { pattern 1 parallel_clock basic_scan } { load_unload } vector("_default_WFT_") := [ 1 0 0.... ]; scan("_Shift17ns_WFT_") := [ 1 1 0.... ], ..... Change timeplate for scan()

Verilog Testbench ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]

Generation of SDC ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]

Results and Analysis Test Design Information ,[object Object],[object Object],[object Object],[object Object]

Results and Analysis Effective Shift Frequency ,[object Object],TOTAL PATTERNS 701 28MHZ 8 37MHZ 54 52MHZ 477 63MHZ 159 Effective Shift Frequency = 53MHZ

Reduction in Test Time Original Patterns @ 28MHZ Scaled Patterns @ 53MHZ Max scan length = 4892 Number of patterns = 701 Shift Period = 35ns Test Time =~ 0.12 sec Max scan length = 4892 Number of patterns = 701 Shift Period = 19ns Test Time =~ 0.06 sec Test Time is reduced by ~45%

Reduction in Test Cost Original Patterns @ 28MHZ Scaled Patterns @ 53MHZ Test Time =~ 0.12 sec Test cost/sec = $0.0076 Shipping Volume = 10Million Total Cost = $91219 Test Time =~ 0.06 sec Test cost/sec = $0.0076 Shipping Volume = 10Million Total Cost = $49597 Save $41,000 per 10M parts

Advantages LOWER TEST TIME NO DESIGN CHANGES SCAN ARCHITECTURE INDEPENDENT POST-TAPEOUT/PRE-TAPEOUT

Conclusion ,[object Object],[object Object],[object Object],Multiple Shift Frequencies for ATPG patterns within the same pattern set To Reduce Test Time without excessive power dissipation Increase Shift Frequency of Patterns with Low Power Dissipation

Dynamic Shift Frequency Scaling Of ATPG Patterns

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Dynamic Shift Frequency Scaling Of ATPG Patterns