SPICE MODEL of SSM3K7002F (Professional+BDP Model) in SPICE PARK

Device Modeling Report

COMPONENTS: Power MOSFET (Professional Model)
PART NUMBER: SSM3K7002F
MANUFACTURER: TOSHIBA
Body Diode (Professional Model) / ESD Protection

Bee Technologies Inc.

All Rights Reserved Copyright (c) Bee Technologies Inc. 2008

MOSFET MODEL

PSpice model
Model description
parameter
LEVEL
L Channel Length
W Channel Width
KP Transconductance
RS Source Ohmic Resistance
RD Ohmic Drain Resistance
VTO Zero-bias Threshold Voltage
RDS Drain-Source Shunt Resistance
TOX Gate Oxide Thickness
CGSO Zero-bias Gate-Source Capacitance
CGDO Zero-bias Gate-Drain Capacitance
CBD Zero-bias Bulk-Drain Junction Capacitance
MJ Bulk Junction Grading Coefficient
PB Bulk Junction Potential
FC Bulk Junction Forward-bias Capacitance Coefficient
RG Gate Ohmic Resistance
IS Bulk Junction Saturation Current
N Bulk Junction Emission Coefficient
RB Bulk Series Resistance
PHI Surface Inversion Potential
GAMMA Body-effect Parameter
DELTA Width effect on Threshold Voltage
ETA Static Feedback on Threshold Voltage
THETA Mobility Modulation
KAPPA Saturation Field Factor
VMAX Maximum Drift Velocity of Carriers
XJ Metallurgical Junction Depth
UO Surface Mobility


Transconductance Characteristic

Circuit Simulation Result

500
Measurement
450
Simulation
Transconductance GFS (ms)

400

350

300

250

200

150

100

50

0
0 50 100 150 200
Drain Current ID (mA)

Comparison table

Gfs (ms)
ID (mA) Error (%)
Measurement Simulation
1 28.200 28.973 2.74
2 40.700 40.973 0.67
5 64.200 64.773 0.89
10 91.300 91.580 0.31
20 130.000 129.466 -0.41
50 204.600 204.552 -0.02
100 290.000 289.036 -0.33
200 410.000 408.172 -0.45


Vgs-Id Characteristic

Circuit Simulation result

1.0A

100mA

10mA

1.0mA
0V 1.0V 2.0V 3.0V 4.0V
I(V2)
V_V1
Evaluation circuit

V2

0Vdc

U1
SSM3K7002F Vv ariable

V1 10Vdc

0Vdc

0


Comparison Graph


1000
Measurement
Simulation
Drain C urrent ID (mA)

100

10

1
0 1 2 3 4
Gate-Source Voltage VGS (V)
Simulation Result

VGS(V)
ID (mA) Error (%)
1 1.510 1.556 3.01
2 1.560 1.584 1.54
5 1.640 1.641 0.05
10 1.718 1.705 -0.77
20 1.815 1.795 -1.09
50 2.000 1.975 -1.26
100 2.180 2.178 -0.11
200 2.440 2.464 0.99


Rds(on) Characteristic

500mA

400mA

300mA

200mA

100mA

0A
0V 0.1V 0.2V 0.3V 0.4V 0.5V 0.6V 0.7V 0.8V 0.9V
I(Vsense)
V_VDS
Evaluation circuit
V2

0Vdc

U1
SSM3K7002F Vv ariable

V1 10Vdc

10Vdc

0

Simulation Result

ID = 0.5A, VGS = 10V Measurement Simulation Error (%)
R DS (on)  2.00 2.00 0.00


Gate Charge Characteristic


10V

9V

8V

7V

6V

5V

4V

3V

2V

1V

0V
0 0.4n 0.8n 1.2n 1.6n 2.0n 2.4n 2.8n 3.2n 3.6n
V(W1:3)
Time*1mS

Evaluation circuit
V2

0Vdc

Dbreak

U1 D1
SSM3K7002F I2
PER = 1000u W1 0.2Adc
PW = 600u +
TF = 10n
TR = 10n
-
TD = 0 W
I2 = 1m IOFF = 0.1mA V1
I1 = 0 I1 ION = 0uA 30Vds

0

Simulation Result

VDD=30V, ID=0.2A,
Measurement Simulation Error (%)
VGS=10V
Qgs nC 0.220 0.230 4.55
Qgd nC 0.200 0.195 -2.50
Qg nC 1.480 1.485 0.34


Gate Charge Characteristic Reference

Measurement

VGS-Qg
12
VDD=30V
10

8
VGS (V)

6

4

2

0
0 0.4 0.8 1.2 1.6 2
Qg (nC)


Capacitance Characteristic

Measurement
Simulation

Simulation Result

Cbd (pF)
VDS (V) Error (%)
1 14.300 14.200 0.70
2 12.500 12.700 -1.57
5 9.200 9.250 -0.54
5 9.200 9.250 -0.54
10 6.200 6.250 -0.80


Switching Time Characteristic

12V

10V

8V

6V

4V

2V

0V

-2V
0.97us 0.98us 0.99us 1.00us 1.01us 1.02us 1.03us 1.04us
V(L3:1) V(L2:1)/3
Time

Evaluation circuit

L2

30nH

RL
150
R2
L3 U1
SSM3K7002F

V1 = 0 50 30nH
V2 = 20 V2 R3 VDD
TD = 2u 50 30
TR = 5n
TF = 5n
PW = 10u
PER = 100u

0

Simulation Result

ID=0.2A, VDD=30V
VGS=0/10V
td(on) ns 2.400 2.479 3.29


Output Characteristic


1.0A

0.9A
10
0.8A
7
5
0.7A
4.5
4.0
0.6A

3.3
0.5A
3.0
0.4A
2.7
0.3A
2.5
0.2A

0.1A VGS=2.3V

0A
0V 0.5V 1.0V 1.5V 2.0V
I(Vdsense)
V_Vvariable
Evaluation circuit

Vsense

U1
SSM3K7002F
VD
10Vdc

VGS

0


Forward Current Characteristic


1.0A

0.9A

0.8A

0.7A

0.6A

0.5A

0.4A

0.3A

0.2A

0.1A

0A
0V 0.2V 0.4V 0.6V 0.8V 1.0V 1.2V 1.4V
I(R1)
V_V1

Evaluation Circuit

R1

0.01m
U1
D3K7002F_PRO
V1

0Vdc

0


Comparison Graph


Simulation Result

VSD(V)
IDR(mA) %Error
10 0.630 0.630 0.04
20 0.680 0.679 -0.21
50 0.745 0.748 0.34
100 0.810 0.807 -0.35
200 0.880 0.880 0.02
500 1.025 1.022 -0.34
800 1.130 1.133 0.27


Reverse Recovery Characteristics


400mA

300mA

200mA

100mA

-0mA

-100mA

-200mA

-300mA

-400mA
19.96us 20.00us 20.04us 20.08us 20.12us 20.16us
I(R1)
Time

Evaluation Circuit

R1

50

V1 = -9.5v U1
V1
V2 = 10.75v D3K7002F_PRO
TD = 0.65u
TR = 20ns
TF = 20ns
PW = 20us
PER = 100us

0

Compare Measurement vs. Simulation

trj ns 19.20 19.19 -0.05
trb ns 11.60 11.47 -1.12
trr ns 30.80 30.66 -0.45


Reverse Recovery Characteristic Reference

Measurement

trj=19.20(ns)
trb=11.60(ns)
Conditions:Ifwd=lrev=0.2(A),Rl=50

Example

Relation between trj and trb


Zener Voltage Characteristic


10mA

9mA

8mA

7mA

6mA

5mA

4mA

3mA

2mA

1mA

0A
0V 5V 10V 15V 20V 25V 30V 35V 40V 45V 50V
I(R1)
V_V1

Evaluation Circuit

R1

0.01m U1
SSM3K7002F open

open

V1 Ropen
0Vdc 100MEG

0

0


Zener Voltage Characteristic Reference

Measurement


SPICE MODEL of SSM3K7002F (Professional+BDP Model) in SPICE PARK

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