Sofics has verified its TakeCharge ESD protection clamps on technology nodes between 0.25um CMOS down to 5nm across various fabs and foundries. The ESD clamps are silicon and product proven in more than 4500 mass produced IC-products. The cells provide competitive advantage through improved yield, reduced silicon footprint and enable advanced multimedia and wireless interfaces like HDMI, USB 3.0, SATA, WIFI, GPS and Bluetooth.

1. TSMC 65nm 1.2V ESD protection overview
Sofics proprietary and confidential © 2021
Page 1 of 2
1.2V analog IO for TSMC 65nm CMOS
Overview of available cells
Sofics BVBA
RPR 0472.687.037
Brugse Baan 188A
8470 Gistel
Contact:
Bart Keppens
0032-485.115.262
bkeppens@sofics.com

2. TSMC 65nm 1.2V ESD protection overview
Sofics proprietary and confidential © 2021
Page 2 of 2
1. Analog I/O library for 1.2V interfaces – TSMC 65nm
The library contains 7 different cells
Cell name Purpose Additional info
DS-TS65-PC1V2 1.2V core protection clamp
Power clamp
Option 1: wired to connect core
Vdd, Vss
Option 2: wired to connect IO
VDDPST, VSSPST
DS-TS65-AIO1V2-OVT 1.2V analog I/O with over-voltge
tolerant feature. No diode to Vdd
Option 1: wired between IO
and VSSPST
Option 2: wired between IO
and VSSPST + anti-parallel
diodes between VSSPST and
VSS
DS-TS65-AIO1V2-FL 1.2V analog I/O – full local protection
with integrated power clamp
Power bus resistance is not
important in IO related stress
cases
DS-TS65-AIO1V2-FL-CDM 1.2V analog I/O – full local protection
with integrated power clamp
Integrated CDM protection for
sensitive circuit protection
Power bus resistance is not
important in IO related stress
cases
Power cut cell Transfers only VSS bus Separate Vdd bus lines from
TSMC GPIO libraries