2. Plastic Electronics Technology
Uses plastic instead of traditional silicon semiconductors
and glass
Enables a revolutionary design and form-factor
Shatterproof, Thin, Large and Light Display
3. Company History
Display Development
10+ transistors 100+ transistors 1.2 M transistors Colour EPD 2.8 M transistors
Research, Process Development & Manufacturing
2000: Cambridge Technology 2008: Dresden Display Factory
Cambridge University Center translating research First plastic electronics factory in
Research in organic electronics into products the world
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4. R&D and Production Set-Up
Technology
Transfer
Cambridge R&D
Prototype Line (14”)
Cambridge R&D Prototype Line
Proof of concepts
Highly configurable process
New designs in < 1 month
1” Chips to A4 displays
R&D Engineers
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5. R&D and Production Set-Up
Technology
Transfer
Dresden Factory (Gen 3.5)
Dresden Gen. 3.5 Factory
Backplane Manufacturing
Qualified volume process
Production equipment
Fully Automated Handling
Process, Equipment, Integration
Engineers
Thousands of displays/week
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6. The Manufacturing Challenge
It is one thing to show a single display at a tradeshow…
...quite another to develop a high yield manufacturing process
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7. Plastic Logic’s Manufacturing Process
• Key differences in manufacturing organic and flexible electronics:
Solution processing
Direct-write fabrication techniques to avoid mask-alignment
Low process temperatures to permit use of cheap flexible substrates
• Developed unique process know how and IP:
Handling plastic sheets throughout the process line
Large area deposition technologies of organic and inorganic materials
Cleaning and conditioning of the layers to improve device performance
• Industrialisation means:
Reproducibility
Homogeneity
327.0-328.0
326.0-327.0
328.0
325.0-326.0
327.0
324.0-325.0
326.0
590 323.0-324.0
325.0
585 322.0-323.0
324.0
580 321.0-322.0
323.0
322.0 320.0-321.0
575
321.0 319.0-320.0
570
320.0
319.0 565
60
62.5
65
560
67.5
70
72.5
75
77.5
555
80
82.5
85
87.5
90
92.5
550
95
97.5
100
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8. Processing challenges in development phase
Optimising process conditions is critical part of industrialisation process
Monitoring data from coating process in the first year (2009)
Thickness mean
Monitoring data from same process one year later
Thickness mean
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9. Display Testing and Reliability
Testing requires precise handling and alignment of flexible displays
Test development for transistor and display parameters
− Definition of test specifications
− Electrical and Optical tests for production
− Test methods for OTFT and other characterisation structures
Reliability optimization for quality and lifetime behavior
− Accelerated test under different environmental conditions for lifetime projections
− Based on existing models for Si-based integrated circuits
− Parameters adapted to organic materials in terms of
temperature sensitivities and reaction to cycling
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10. Reliability challenges in development phase
Reliability problem solving was critical part of industrialisation process
Typical problem in early development (2009)
Problem solved
Delamination during climatic tests
Today, Plastic Logic displays have been stressed beyond 10M updates
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11. Technology Position Today
Developed the lightest, most durable display
technology available today
Demonstrated scalability in the first and largest
production facility
Developed the first flexible colour display
Protected with a strong IP position
– 101 patents and applications
– 36 granted to date
1-2 year lead over the competition for flexible
backplane technology
A single display has 1.2M uniform and reliable
plastic transistors
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13. Colour EP Display Architecture
Encapsulation sheet Colour Filter Array
Plastic Substrate
E Ink Frontplane
Plastic Logic Backplane Technology
Low Distortion Plastic
Plastic Substrate Logic Backplane
Colour Filter patterned by multiple approaches (wet printing, sheet-to-sheet
alignment).
During CFA pattern formation, the backplane pixel electrodes are not
visible (obscured by E Ink layer).
Backplane:
1280 x 960 pixels (monochrome) = 640 x 480 Colour
150PPI (monochrome) = 75PPI Colour
Active Area: 217.6mm x 163.2mm
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14. Low Distortion Backplane
Pixel
Conventional glass Electrode
backplanes require regular
grid for all layers (source,
Interlayer
drain, gate, via, etc) Via Dielectric
This allows overlay of pre-
patterned layers (eg Colour
Filter)
Distortion in flexible
substrates makes this
difficult
Plastic Logic Process resets
distortion at the pixel
electrode layer, with no loss
in pixel performance. Plastic Backplane: Top Pixels
Glass Backplane: All stack
layers on a regular grid maintained on a regular grid
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15. Colour Filter Overlay
RGBW colour filter patterned onto E Ink surface
Overlay accuracy of 10µm achieved across the active area
Four variants of different colour density investigated
RGBW CFA pattern over E Ink R pixels driven “white” to show alignment
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16. Colour Display Performance - Gamut
4 colour densities tested
(A,B,C,D)
Gamut (∆E3):
Type A: 5000
Type B: 4000
Type C: 3400
Type D: 3000
Excellent colour
uniformity, viewing angle
Acknowledgement: A. Bouchard, E Ink
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17. Flexible Displays: Now Available
Display size 1” - 10.7”
Backplane Grey Levels 4 – 16
Pixel pitch up to 225ppi
Contrast Ratio 12:1
Thickness thin as 130 µm
Weight down to 11g
Colour Available
NTSC 2-5%
Paper-like finish
Excellent readability
Colour gamut high enough to
enable distinguishability
Bistable enables long battery life
1280 x 960 Colour Display
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18. Plastic Logic Technology in Action
• 10 to 12.5 frames per second video on e-ink with colour filters
• Driven with 20 sub-frames to maintain voltage across e-ink.
• Backplane driving at 200 to 225fps
www.youtube.com/plasticlogic
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19. Plastic Logic’s Displays
• Plastic Logic is a flexible display OEM and technology provider. We can
supply displays in variety of sizes and resolutions and enable others to
do so through licensing arrangements.
• Plastic Logic is a global leader in OTFT devices and the challenges of
manufacturing on plastic.
• Plastic Logic is actively looking to partner with companies who can
open up new markets for our display technology.
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