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®                                                                                                                    TDA7293

    120V - 100W DMOS AUDIO AMPLIFIER WITH MUTE/ST-BY

  VERY HIGH OPERATING VOLTAGE RANGE
  (±50V)                                                                                  MULTIPOWER BCD TECHNOLOGY
  DMOS POWER STAGE
  HIGH OUTPUT POWER (100W @ THD =
  10%, RL = 8Ω, VS = ±40V)
  MUTING/STAND-BY FUNCTIONS
  NO SWITCH ON/OFF NOISE
  VERY LOW DISTORTION
  VERY LOW NOISE                                                                                    Multiwatt15
  SHORT CIRCUIT PROTECTION                                                                  ORDERING NUMBER: TDA7293V
  THERMAL SHUTDOWN
  CLIP DETECTOR
  MODULARITY (MORE DEVICES CAN BE                                                class TV). Thanks to the wide voltage range and
  EASILY CONNECTED IN PARALLEL TO                                                to the high out current capability it is able to sup-
                                                                                 ply the highest power into both 4Ω and 8Ω loads.
  DRIVE VERY LOW IMPEDANCES)
                                                                                 The built in muting function with turn on delay
DESCRIPTION                                                                      simplifies the remote operation avoiding switching
                                                                                 on-off noises.
The TDA7293 is a monolithic integrated circuit in                                Parallel mode is made possible by connecting
Multiwatt15 package, intended for use as audio                                   more device through of pin11. High output power
class AB amplifier in Hi-Fi field applications                                   can be delivered to very low impedance loads, so
(Home Stereo, self powered loudspeakers, Top-                                    optimizing the thermal dissipation of the system.

Figure 1: Typical Application and Test Circuit


                                                                C7 100nF                          +Vs   C6 1000µF

                                                R3 22K
                                                                       +Vs       BUFFER DRIVER         +PWVs
                    C2
                         R2                                                  7       11                13
                   22µF 680Ω
                                         IN-     2
                                                                   -
                                                                                                                        14     OUT
                       C1 470nF
                                     IN+         3
                                                                   +
                                                                                                                               BOOT
                     R1 22K                                                                                             12     LOADER
                                  SGND           4                                                                                 C5
                                                                                                                                  22µF             (*)
                                  (**)
                                                                                                                        6
                                                                                                                               BOOTSTRAP
     VMUTE         R5 10K         MUTE           10                                                                     5
                                                         MUTE                     THERMAL            S/C                                   VCLIP
                                                                                                                               CLIP DET
                                                                                 SHUTDOWN         PROTECTION
      VSTBY                       STBY           9       STBY
                   R4 22K
                                                            1                8                    15
                                                            STBY-GND         -Vs                  -PWVs

                  C3 10µF                      C4 10µF                       C9 100nF                       C8 1000µF
                                                                                                                             D97AU805A
                                                                                            -Vs
                            (*) see Application note
                            (**) for SLAVE function




December1999                                                                                                                                             1/13
TDA7293

PIN CONNECTION (Top view)

                                                        15                  -VS (POWER)
                                                        14                  OUT
                                                        13                  +VS (POWER)
                                                        12                  BOOTSTRAP LOADER
                                                        11                  BUFFER DRIVER
                                                        10                  MUTE
                                                         9                  STAND-BY
                                                         8                  -VS (SIGNAL)
                                                         7                  +VS (SIGNAL)
                                                         6                  BOOTSTRAP
                                                         5                  CLIP AND SHORT CIRCUIT DETECTOR
                                                         4                  SIGNAL GROUND
                                                         3                  NON INVERTING INPUT
                                                         2                  INVERTING INPUT
                                                         1                  STAND-BY GND


                         TAB CONNECTED TO PIN 8                  D97AU806




QUICK REFERENCE DATA
  Symbol                 Parameter                           Test Conditions                  Min.     Typ.     Max.   Unit
       VS      Supply Voltage Operating                                                       ±12               æ 50    V
   GLOOP       Closed Loop Gain                                                               26                 40    dB
               Output Power                           VS = ±45V; RL = 8Ω; THD = 10%                       140           W
       Ptot
                                                      VS = ±30V; RL = 4Ω; THD = 10%                       110           W
    SVR        Supply Voltage Rejection                                                                   75           dB

ABSOLUTE MAXIMUM RATINGS
  Symbol                                    Parameter                                                Value             Unit
       VS      Supply Voltage (No Signal)                                                             ±60               V
       V1      VSTAND-BY GND Voltage Referred to -VS (pin 8)                                          90                V
       V2      Input Voltage (inverting) Referred to -VS                                               90               V
  V2 - V3      Maximum Differential Inputs                                                            ±30               V
       V3      Input Voltage (non inverting) Referred to -VS                                           90               V
       V4      Signal GND Voltage Referred to -VS                                                      90               V
       V5      Clip Detector Voltage Referred to -VS                                                  120               V
       V6      Bootstrap Voltage Referred to -VS                                                      120               V
       V9      Stand-by Voltage Referred to -VS                                                       120               V
       V10     Mute Voltage Referred to -VS                                                           120               V
       V11     Buffer Voltage Referred to -VS                                                         120               V
       V12     Bootstrap Loader Voltage Referred to -VS                                               100               V
       IO      Output Peak Current                                                                     10               A
       Ptot    Power Dissipation T case = 70°C                                                         50               W
       Top     Operating Ambient Temperature Range                                                   0 to 70            °C
   Tstg, Tj    Storage and Junction Temperature                                                       150               °C

THERMAL DATA
  Symbol                                          Description                                        Typ        Max    Unit
  Rth j-case   Thermal Resistance Junction-case                                                       1         1.5    °C/W


2/13
TDA7293

ELECTRICAL CHARACTERISTICS (Refer to the Test Circuit VS = ±40V, RL = 8Ω, Rg = 50 Ω;
T amb = 25°C, f = 1 kHz; unless otherwise specified).
  Symbol                    Parameter                             Test Condition               Min.   Typ.    Max.     Unit
     VS        Supply Range                                                                    ±12            ±50       V
     Iq        Quiescent Current                                                                       30              mA
     Ib        Input Bias Current                                                                      0.3     1       µA
    VOS        Input Offset Voltage                                                            -10             10      mV
     IOS       Input Offset Current                                                                           0.2      µA
     PO        RMS Continuous Output Power               d = 1%:                                       80               W
                                                         R L = 4Ω; VS = ± 29V,                         80
                                                         d = 10%                                      100               W
                                                         R L = 4Ω ; VS = ±29V                         100
      d        Total Harmonic Distortion (**)            PO = 5W; f = 1kHz                            0.005             %
                                                         PO = 0.1 to 50W; f = 20Hz to 15kHz                   0.1       %
     ISC       Current Limiter Threshold                                                               6.5              A
    SR         Slew Rate                                                                               15              V/µs
     GV        Open Loop Voltage Gain                                                                  80              dB
     GV        Closed Loop Voltage Gain (1)                                                            30              dB
     eN        Total Input Noise                         A = curve                                      1              µV
                                                         f = 20Hz to 20kHz                              2      5       µV
     Ri        Input Resistance                                                                100                     kΩ
    SVR        Supply Voltage Rejection                  f = 100Hz; Vripple = 0.5Vrms                  75              dB
     TS        Thermal Protection                        DEVICE MUTED                                 150              °C
                                                         DEVICE SHUT DOWN                             160              °C
  STAND-BY FUNCTION (Ref: to pin 1)
   VST on      Stand-by on Threshold                                                                          1.5       V
   VST off     Stand-by off Threshold                                                          3.5                      V
  ATTst-by     Stand-by Attenuation                                                            70      90              dB
   Iq st-by    Quiescent Current @ Stand-by                                                            0.5             mA
  MUTE FUNCTION (Ref: to pin 1)
    VMon       Mute on Threshold                                                                              1.5       V
    VMoff      Mute off Threshold                                                              3.5                      V
  ATTmute      Mute AttenuatIon                                                                60      80              dB
  CLIP DETECTOR
    Duty       Duty Cycle ( pin 5)                       THD = 1% ; RL = 10KΩ to 5V                    10               %
                                                         THD = 10% ;                                   40               %
                                                         RL = 10KΩ to 5V
   ICLEAK                                                PO = 50W                                              1       µA
  SLAVE FUNCTION pin 4 (Ref: to pin 8 -VS)
   VSlave      SlaveThreshold                                                                                  1        V
  VMaster      Master Threshold                                                                 3                       V
Note (1): GVmin ≥ 26dB

Note: Pin 11 only for modular connection. Max external load 1MΩ/10 pF, only for test purpose

Note (**): Tested with optimized Application Board (see fig. 2)




                                                                                                                         3/13
TDA7293

Figure 2: Typical Application P.C. Board and Component Layout (scale 1:1)




4/13
TDA7293

APPLICATION SUGGESTIONS (see Test and Application Circuits of the Fig. 1)
The recommended values of the external components are those shown on the application circuit of Fig-
ure 1. Different values can be used; the following table can help the designer.

                                                                                  LARGER THAN        SMALLER THAN
    COMPONENTS               SUGGESTED VALUE                     PURPOSE
                                                                                   SUGGESTED          SUGGESTED

           R1 (*)                        22k              INPUT RESISTANCE      INCREASE INPUT      DECREASE INPUT
                                                                                  IMPEDANCE           IMPEDANCE

            R2                         680Ω               CLOSED LOOP GAIN DECREASE OF GAIN INCREASE OF GAIN
                                                            SET TO 30dB (**)
           R3 (*)                        22k                                 INCREASE OF GAIN DECREASE OF GAIN

            R4                           22k                    ST-BY TIME       LARGER ST-BY        SMALLER ST-BY
                                                                CONSTANT          ON/OFF TIME         ON/OFF TIME;
                                                                                                       POP NOISE

            R5                           10k                    MUTE TIME         LARGER MUTE        SMALLER MUTE
                                                                CONSTANT           ON/OFF TIME        ON/OFF TIME

            C1                        0.47µF                   INPUT DC                                HIGHER LOW
                                                              DECOUPLING                               FREQUENCY
                                                                                                         CUTOFF

            C2                         22µF                  FEEDBACK DC                               HIGHER LOW
                                                             DECOUPLING                                FREQUENCY
                                                                                                         CUTOFF

            C3                         10µF                     MUTE TIME         LARGER MUTE        SMALLER MUTE
                                                                CONSTANT           ON/OFF TIME        ON/OFF TIME

            C4                         10µF                     ST-BY TIME       LARGER ST-BY        SMALLER ST-BY
                                                                CONSTANT          ON/OFF TIME         ON/OFF TIME;
                                                                                                       POP NOISE

            C5                     22µFXN (***)            BOOTSTRAPPING                                SIGNAL
                                                                                                    DEGRADATION AT
                                                                                                    LOW FREQUENCY

          C6, C8                      1000µF               SUPPLY VOLTAGE
                                                               BYPASS

          C7, C9                       0.1µF               SUPPLY VOLTAGE                              DANGER OF
                                                               BYPASS                                  OSCILLATION

(*) R1 = R3 for pop optimization

(**) Closed Loop Gain has to be ≥ 26dB

(***) Multiplay this value for the number of modular part connected


Slave function: pin 4 (Ref to pin 8 -VS)                               Note:
                                                                       If in the application, the speakers are connected
                                                                       via long wires, it is a good rule to add between
                                    MASTER                             the output and GND, a Boucherot Cell, in order to
                 -VS +3V                                               avoid dangerous spurious oscillations when the
                                                                       speakers terminal are shorted.
                                   UNDEFINED                           The suggested Boucherot Resistor is 3.9Ω/2W
                 -VS +1V
                                                                       and the capacitor is 1µF.

                                     SLAVE
                    -VS
                                             D98AU821



                                                                                                                     5/13
TDA7293

INTRODUCTION                                            frequency response; moreover, an accurate con-
                                                        trol of quiescent current is required.
In consumer electronics, an increasing demand
has arisen for very high power monolithic audio         A local linearizing feedback, provided by differen-
amplifiers able to match, with a low cost, the per-     tial amplifier A, is used to fullfil the above require-
formance obtained from the best discrete de-            ments, allowing a simple and effective quiescent
signs.                                                  current setting.
The task of realizing this linear integrated circuit    Proper biasing of the power output transistors
in conventional bipolar technology is made ex-          alone is however not enough to guarantee the ab-
tremely difficult by the occurence of 2nd break-        sence of crossover distortion.
down phoenomenon. It limits the safe operating          While a linearization of the DC transfer charac-
area (SOA) of the power devices, and, as a con-         teristic of the stage is obtained, the dynamic be-
sequence, the maximum attainable output power,          haviour of the system must be taken into account.
especially in presence of highly reactive loads.        A significant aid in keeping the distortion contrib-
Moreover, full exploitation of the SOA translates       uted by the final stage as low as possible is pro-
into a substantial increase in circuit and layout       vided by the compensation scheme, which ex-
complexity due to the need of sophisticated pro-        ploits the direct connection of the Miller capacitor
tection circuits.                                       at the amplifier’s output to introduce a local AC
To overcome these substantial drawbacks, the            feedback path enclosing the output stage itself.
use of power MOS devices, which are immune
from secondary breakdown is highly desirable.           2) Protections
The device described has therefore been devel-          In designing a power IC, particular attention must
oped in a mixed bipolar-MOS high voltage tech-          be reserved to the circuits devoted to protection
nology called BCDII 100/120.                            of the device from short circuit or overload condi-
                                                        tions.
1) Output Stage                                         Due to the absence of the 2nd breakdown phe-
The main design task in developping a power op-         nomenon, the SOA of the power DMOS transis-
erational amplifier, independently of the technol-      tors is delimited only by a maximum dissipation
ogy used, is that of realization of the output stage.   curve dependent on the duration of the applied
                                                        stimulus.
The solution shown as a principle shematic by
Fig3 represents the DMOS unity - gain output            In order to fully exploit the capabilities of the
buffer of the TDA7293.                                  power transistors, the protection scheme imple-
                                                        mented in this device combines a conventional
This large-signal, high-power buffer must be ca-        SOA protection circuit with a novel local tempera-
pable of handling extremely high current and volt-      ture sensing technique which ” dynamically” con-
age levels while maintaining acceptably low har-        trols the maximum dissipation.
monic distortion and good behaviour over
Figure 3: Principle Schematic of a DMOS unity-gain buffer.




6/13
TDA7293

Figure 4: Turn ON/OFF Suggested Sequence

                               +Vs
                               (V)
                                 +40




                                 -40




                                -Vs
                                VIN
                               (mV)



                              VST-BY
                              PIN #9        5V
                                (V)




                              VMUTE         5V
                              PIN #10
                                (V)




                                IQ
                               (mA)


                              VOUT
                               (V)
                                        OFF

                                        ST-BY
                                                               PLAY           ST-BY    OFF

                                                    MUTE              MUTE
                                                                                        D98AU817




In addition to the overload protection described                      mute functions, independently driven by two
above, the device features a thermal shutdown                         CMOS logic compatible input pins.
circuit which initially puts the device into a muting                 The circuits dedicated to the switching on and off
state (@ Tj = 150 oC) and then into stand-by (@                       of the amplifier have been carefully optimized to
Tj = 160 oC).                                                         avoid any kind of uncontrolled audible transient at
Full protection against electrostatic discharges on                   the output.
every pin is included.                                                The sequence that we recommend during the
                                                                      ON/OFF transients is shown by Figure 4.
Figure 5: Single Signal ST-BY/MUTE Control                            The application of figure 5 shows the possibility of
          Circuit                                                     using only one command for both st-by and mute
                                                                      functions. On both the pins, the maximum appli-
                                                                      cable range corresponds to the operating supply
                                                                      voltage.
                                     MUTE        STBY
   MUTE/               20K
   ST-BY
                                                                      APPLICATION INFORMATION
                 10K    30K                                           HIGH-EFFICIENCY
                                         10µF        10µF             Constraints of implementing high power solutions
                       1N4148                                         are the power dissipation and the size of the
                                                    D93AU014          power supply. These are both due to the low effi-
                                                                      ciency of conventional AB class amplifier ap-
                                                                      proaches.
                                                                      Here below (figure 6) is described a circuit pro-
                                                                      posal for a high efficiency amplifier which can be
3) Other Features                                                     adopted for both HI-FI and CAR-RADIO applica-
The device is provided with both stand-by and                         tions.

                                                                                                                      7/13
TDA7293

The TDA7293 is a monolithic MOS power ampli-          The main advantages offered by this solution are:
fier which can be operated at 100V supply voltage     - High power performances with limited supply
(120V with no signal applied) while delivering out-     voltage level.
put currents up to ±6.5 A.
This allows the use of this device as a very high     - Considerably high output power even with high
power amplifier (up to 180W as peak power with          load values (i.e. 16 Ohm).
T.H.D.=10 % and Rl = 4 Ohm); the only drawback        With Rl= 8 Ohm, Vs = ±25V the maximum output
is the power dissipation, hardly manageable in        power obtainable is 150 W, while with Rl=16
the above power range.                                Ohm, Vs = ±40V the maximum Pout is 200 W.
The typical junction-to-case thermal resistance of
the TDA7293 is 1 oC/W (max= 1.5 oC/W). To
avoid that, in worst case conditions, the chip tem-   APPLICATION NOTE: (ref. fig. 7)
perature exceedes 150 oC, the thermal resistance
of the heatsink must be 0.038 oC/W (@ max am-         Modular Application (more Devices in Parallel)
bient temperature of 50 oC).                          The use of the modular application lets very high
As the above value is pratically unreachable; a       power be delivered to very low impedance loads.
high efficiency system is needed in those cases       The modular application implies one device to act
where the continuous RMS output power is higher       as a master and the others as slaves.
than 50-60 W.                                         The slave power stages are driven by the master
The TDA7293 was designed to work also in              device and work in parallel all together, while the
higher efficiency way.                                input and the gain stages of the slave device are
For this reason there are four power supply pins:     disabled, the figure below shows the connections
two intended for the signal part and two for the      required to configure two devices to work to-
power part.                                           gether.
T1 and T2 are two power transistors that only
operate when the output power reaches a certain
threshold (e.g. 20 W). If the output power in-          The master chip connections are the same as
creases, these transistors are switched on during       the normal single ones.
the portion of the signal where more output volt-       The outputs can be connected together with-
age swing is needed, thus ”bootstrapping” the           out the need of any ballast resistance.
power supply pins (#13 and #15).                        The slave SGND pin must be tied to the nega-
The current generators formed by T4, T7, zener          tive supply.
diodes Z1, Z2 and resistors R7,R8 define the            The slave ST-BY pin must be connected to
minimum drop across the power MOS transistors           ST-BY pin.
of the TDA7293. L1, L2, L3 and the snubbers C9,
R1 and C10, R2 stabilize the loops formed by the        The bootstrap lines must be connected to-
”bootstrap” circuits and the output stage of the        gether and the bootstrap capacitor must be in-
TDA7293.                                                creased: for N devices the boostrap capacitor
                                                        must be 22µF times N.
By considering again a maximum average
output power (music signal) of 20W, in case             The slave Mute and IN-pins must be grounded.
of the high efficiency application, the thermal
resistance value needed from the heatsink is          THE BOOTSTRAP CAPACITOR
    o
2.2 C/W (Vs =±50 V and Rl= 8 Ohm).                    For compatibility purpose with the previous de-
All components (TDA7293 and power transis-            vices of the family, the boostrap capacitor can be
tors T1 and T2) can be placed on a 1.5oC/W            connected both between the bootstrap pin (6) and
heatsink, with the power darlingtons electrically     the output pin (14) or between the boostrap pin
insulated from the heatsink.                          (6) and the bootstrap loader pin (12).
Since the total power dissipation is less than that   When the bootcap is connected between pin 6
of a usual class AB amplifier, additional cost sav-   and 14, the maximum supply voltage in presence
ings can be obtained while optimizing the power       of output signal is limited to 100V, due the boot-
supply, even with a high heatsink .                   strap capacitor overvoltage.
                                                      When the bootcap is connected between pins 6
BRIDGE APPLICATION                                    and 12 the maximum supply voltage extend to the
                                                      full voltage that the technology can stand: 120V.
Another application suggestion is the BRIDGE
configuration, where two TDA7293 are used.            This is accomplished by the clamp introduced at
In this application, the value of the load must not   the bootstrap loader pin (12): this pin follows the
be lower than 8 Ohm for dissipation and current       output voltage up to 100V and remains clamped
capability reasons.                                   at 100V for higher output voltages. This feature
A suitable field of application includes HI-FI/TV     lets the output voltage swing up to a gate-source
subwoofers realizations.                              voltage from the positive supply (VS -3 to 6V)

8/13
TDA7293

Figure 6: High Efficiency Application Circuit



   +50V
                                                                                                     T3
                                                    D6                                              BC394              R4        R5
                                                                                           T1
                                                  1N4001                                 BDX53A                        270       270
                                                           D1 BYW98100                                                 T4               T5
   +25V                                                                                                               BC393            BC393
                                                                                        R17 270

                                                                                        L1 1µH      D3 1N4148                    R6
                                                                                                                                 20K
                                                            C12 330nF                                               Z1 3.9V
                                                                               7   13
 R20      C1     C3       C5      C7      C9          IN                 3                                    C11 22µF
 20K   1000µF   100nF   1000µF   100nF   330nF                                                       R3 680
                                                                  R12                     2                                    R7        C16
         63V             35V
                                 R22        R1                    13K                                                         3.3K      1.8nF
                                                                                                   R16     L3 5µH
                                 10K         2                           4                         13K
                                                                              TDA7293                                                           OUT
                                                  PLAY      C13 10µF                     14
   GND                                                                                                     R18 270
                                                                         9                6
                                                  ST-BY       R13 20K                                C15                                              P ot
                                                                                                    22µF                       R8        C17
                                  R23       R2               R14 30K     1                                                    3.3K      1.8nF
                                  10K        2      D5                                   12
                                                  1N4148      R15 10K
 R21      C2     C4       C6       C8     C10                            10    8   15
 20K   1000µF   100nF   1000µF   100nF   330nF                                                                      Z2 3.9V
                                                                C14
         63V             35V
                                                                10µF                    L2 1µH      D4 1N4148
                                                                                                                       T7               T8
                                                           D2 BYW98100                                                BC394            BC394
                                                                                        R19 270
   -25V
                                                                                            T2                         R9        R10    R11
                                           D7                                             BDX54A
                                         1N4001                                                      T6                270       270    20K
                                                                                                    BC393
   -50V
                                                                                                                                D97AU807C




Figure 6a: PCB and Component Layout of the fig. 6




                                                                                                                                                      9/13
TDA7293

Figure 6b: PCB - Solder Side of the fig. 6.




Figure 7: Modular Application Circuit

                                                                 C7 100nF                            +Vs    C6 1000µF

                                                 R3 22K
           MASTER
                                                                                  BUFFER
                                                                        +Vs       DRIVER                   +PWVs
                       C2
                                R2                                            7        11                  13
                      22µF
                               680Ω       IN-     2
                                                                    -
                                                                                                                            14   OUT
                             C1 470nF
                                         IN+      3                                                                                          C10
                                                                    +                                                                       100nF
                                                                                                                                 BOOT
                         R1 22K                                                                                             12   LOADER       R7
                                                                                                                                              2Ω
                                        SGND      4
                                                                                                                                    C5
                                                                                                                                   47µF
          VMUTE       R5 10K            MUTE      10                                                                         6
                                                          MUTE                                                                   BOOTSTRAP
                                                                                     THERMAL            S/C                  5
          VSTBY                         STBY      9                                                                              CLIP DET
                                                          STBY                      SHUTDOWN         PROTECTION
                      R4 22K
                                                             1                8                      15
                                                             STBY-GND         -Vs                    -PWVs
                                                C4 10µF
                                                                               C9 100nF                             C8 1000µF
                                  C3 10µF
                                                                                               -Vs
                                                                                                     +Vs
                                                                 C7 100nF                                   C6 1000µF


                                                                                  BUFFER
                                                                        +Vs       DRIVER                   +PWVs
                                                                              7        11                  13
                                          IN-     2
                                                                    -
                                                                                                                            14   OUT
                                         IN+      3
                                                                    +
                                                                                                                                 BOOT
            SLAVE                                                                                                           12   LOADER
                                        SGND      4

                                        MUTE      10                                                                         6
                                                          MUTE                                                                   BOOTSTRAP
                                                  9                                  THERMAL            S/C                  5
                                                          STBY
                                        STBY                                        SHUTDOWN         PROTECTION

                                                             1                8                      15
                                                             STBY-GND         -Vs                    -PWVs

                                                                               C9 100nF                         C8 1000µF
                                                                                                                                  D97AU808C
                                                                                               -Vs


10/13
TDA7293

Figure 8a: Modular Application P.C. Board and Component Layout (scale 1:1) (Component SIDE)




Figure 8b: Modular Application P.C. Board and Component Layout (scale 1:1) (Solder SIDE)




                                                                                              11/13
TDA7293


                mm                      inch
 DIM.
        MIN.    TYP.    MAX.    MIN.    TYP.    MAX.      OUTLINE AND
  A                       5                     0.197   MECHANICAL DATA
  B                     2.65                    0.104
  C                      1.6                    0.063
  D              1                      0.039
  E     0.49            0.55    0.019           0.022
  F     0.66            0.75    0.026           0.030
 G      1.02    1.27    1.52 0.040      0.050   0.060
 G1     17.53   17.78   18.03 0.690     0.700   0.710
 H1     19.6                    0.772
 H2                     20.2                    0.795
   L    21.9    22.2    22.5    0.862   0.874   0.886
  L1    21.7    22.1    22.5    0.854   0.870   0.886
  L2    17.65            18.1   0.695           0.713
  L3    17.25   17.5    17.75   0.679   0.689   0.699
  L4     10.3   10.7     10.9   0.406   0.421   0.429
  L7    2.65             2.9    0.104           0.114
 M      4.25    4.55    4.85    0.167   0.179   0.191
 M1     4.63    5.08    5.53    0.182   0.200   0.218
  S      1.9             2.6    0.075           0.102
  S1     1.9             2.6    0.075           0.102     Multiwatt15 V
 Dia1   3.65            3.85    0.144           0.152




12/13
TDA7293




Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publicationsupersedes and replaces all information previously supplied. STMicroelectronics products
are notauthorizedfor use as critical components in life support devices or systems without express writtenapproval of STMicroelectronics.
                                           The ST logois a registered trademark of STMicroelectronics
                                        © 1999 STMicroelectronics – Printed in Italy – All Rights Reserved
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TDA7293

  • 1. ® TDA7293 120V - 100W DMOS AUDIO AMPLIFIER WITH MUTE/ST-BY VERY HIGH OPERATING VOLTAGE RANGE (±50V) MULTIPOWER BCD TECHNOLOGY DMOS POWER STAGE HIGH OUTPUT POWER (100W @ THD = 10%, RL = 8Ω, VS = ±40V) MUTING/STAND-BY FUNCTIONS NO SWITCH ON/OFF NOISE VERY LOW DISTORTION VERY LOW NOISE Multiwatt15 SHORT CIRCUIT PROTECTION ORDERING NUMBER: TDA7293V THERMAL SHUTDOWN CLIP DETECTOR MODULARITY (MORE DEVICES CAN BE class TV). Thanks to the wide voltage range and EASILY CONNECTED IN PARALLEL TO to the high out current capability it is able to sup- ply the highest power into both 4Ω and 8Ω loads. DRIVE VERY LOW IMPEDANCES) The built in muting function with turn on delay DESCRIPTION simplifies the remote operation avoiding switching on-off noises. The TDA7293 is a monolithic integrated circuit in Parallel mode is made possible by connecting Multiwatt15 package, intended for use as audio more device through of pin11. High output power class AB amplifier in Hi-Fi field applications can be delivered to very low impedance loads, so (Home Stereo, self powered loudspeakers, Top- optimizing the thermal dissipation of the system. Figure 1: Typical Application and Test Circuit C7 100nF +Vs C6 1000µF R3 22K +Vs BUFFER DRIVER +PWVs C2 R2 7 11 13 22µF 680Ω IN- 2 - 14 OUT C1 470nF IN+ 3 + BOOT R1 22K 12 LOADER SGND 4 C5 22µF (*) (**) 6 BOOTSTRAP VMUTE R5 10K MUTE 10 5 MUTE THERMAL S/C VCLIP CLIP DET SHUTDOWN PROTECTION VSTBY STBY 9 STBY R4 22K 1 8 15 STBY-GND -Vs -PWVs C3 10µF C4 10µF C9 100nF C8 1000µF D97AU805A -Vs (*) see Application note (**) for SLAVE function December1999 1/13
  • 2. TDA7293 PIN CONNECTION (Top view) 15 -VS (POWER) 14 OUT 13 +VS (POWER) 12 BOOTSTRAP LOADER 11 BUFFER DRIVER 10 MUTE 9 STAND-BY 8 -VS (SIGNAL) 7 +VS (SIGNAL) 6 BOOTSTRAP 5 CLIP AND SHORT CIRCUIT DETECTOR 4 SIGNAL GROUND 3 NON INVERTING INPUT 2 INVERTING INPUT 1 STAND-BY GND TAB CONNECTED TO PIN 8 D97AU806 QUICK REFERENCE DATA Symbol Parameter Test Conditions Min. Typ. Max. Unit VS Supply Voltage Operating ±12 æ 50 V GLOOP Closed Loop Gain 26 40 dB Output Power VS = ±45V; RL = 8Ω; THD = 10% 140 W Ptot VS = ±30V; RL = 4Ω; THD = 10% 110 W SVR Supply Voltage Rejection 75 dB ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit VS Supply Voltage (No Signal) ±60 V V1 VSTAND-BY GND Voltage Referred to -VS (pin 8) 90 V V2 Input Voltage (inverting) Referred to -VS 90 V V2 - V3 Maximum Differential Inputs ±30 V V3 Input Voltage (non inverting) Referred to -VS 90 V V4 Signal GND Voltage Referred to -VS 90 V V5 Clip Detector Voltage Referred to -VS 120 V V6 Bootstrap Voltage Referred to -VS 120 V V9 Stand-by Voltage Referred to -VS 120 V V10 Mute Voltage Referred to -VS 120 V V11 Buffer Voltage Referred to -VS 120 V V12 Bootstrap Loader Voltage Referred to -VS 100 V IO Output Peak Current 10 A Ptot Power Dissipation T case = 70°C 50 W Top Operating Ambient Temperature Range 0 to 70 °C Tstg, Tj Storage and Junction Temperature 150 °C THERMAL DATA Symbol Description Typ Max Unit Rth j-case Thermal Resistance Junction-case 1 1.5 °C/W 2/13
  • 3. TDA7293 ELECTRICAL CHARACTERISTICS (Refer to the Test Circuit VS = ±40V, RL = 8Ω, Rg = 50 Ω; T amb = 25°C, f = 1 kHz; unless otherwise specified). Symbol Parameter Test Condition Min. Typ. Max. Unit VS Supply Range ±12 ±50 V Iq Quiescent Current 30 mA Ib Input Bias Current 0.3 1 µA VOS Input Offset Voltage -10 10 mV IOS Input Offset Current 0.2 µA PO RMS Continuous Output Power d = 1%: 80 W R L = 4Ω; VS = ± 29V, 80 d = 10% 100 W R L = 4Ω ; VS = ±29V 100 d Total Harmonic Distortion (**) PO = 5W; f = 1kHz 0.005 % PO = 0.1 to 50W; f = 20Hz to 15kHz 0.1 % ISC Current Limiter Threshold 6.5 A SR Slew Rate 15 V/µs GV Open Loop Voltage Gain 80 dB GV Closed Loop Voltage Gain (1) 30 dB eN Total Input Noise A = curve 1 µV f = 20Hz to 20kHz 2 5 µV Ri Input Resistance 100 kΩ SVR Supply Voltage Rejection f = 100Hz; Vripple = 0.5Vrms 75 dB TS Thermal Protection DEVICE MUTED 150 °C DEVICE SHUT DOWN 160 °C STAND-BY FUNCTION (Ref: to pin 1) VST on Stand-by on Threshold 1.5 V VST off Stand-by off Threshold 3.5 V ATTst-by Stand-by Attenuation 70 90 dB Iq st-by Quiescent Current @ Stand-by 0.5 mA MUTE FUNCTION (Ref: to pin 1) VMon Mute on Threshold 1.5 V VMoff Mute off Threshold 3.5 V ATTmute Mute AttenuatIon 60 80 dB CLIP DETECTOR Duty Duty Cycle ( pin 5) THD = 1% ; RL = 10KΩ to 5V 10 % THD = 10% ; 40 % RL = 10KΩ to 5V ICLEAK PO = 50W 1 µA SLAVE FUNCTION pin 4 (Ref: to pin 8 -VS) VSlave SlaveThreshold 1 V VMaster Master Threshold 3 V Note (1): GVmin ≥ 26dB Note: Pin 11 only for modular connection. Max external load 1MΩ/10 pF, only for test purpose Note (**): Tested with optimized Application Board (see fig. 2) 3/13
  • 4. TDA7293 Figure 2: Typical Application P.C. Board and Component Layout (scale 1:1) 4/13
  • 5. TDA7293 APPLICATION SUGGESTIONS (see Test and Application Circuits of the Fig. 1) The recommended values of the external components are those shown on the application circuit of Fig- ure 1. Different values can be used; the following table can help the designer. LARGER THAN SMALLER THAN COMPONENTS SUGGESTED VALUE PURPOSE SUGGESTED SUGGESTED R1 (*) 22k INPUT RESISTANCE INCREASE INPUT DECREASE INPUT IMPEDANCE IMPEDANCE R2 680Ω CLOSED LOOP GAIN DECREASE OF GAIN INCREASE OF GAIN SET TO 30dB (**) R3 (*) 22k INCREASE OF GAIN DECREASE OF GAIN R4 22k ST-BY TIME LARGER ST-BY SMALLER ST-BY CONSTANT ON/OFF TIME ON/OFF TIME; POP NOISE R5 10k MUTE TIME LARGER MUTE SMALLER MUTE CONSTANT ON/OFF TIME ON/OFF TIME C1 0.47µF INPUT DC HIGHER LOW DECOUPLING FREQUENCY CUTOFF C2 22µF FEEDBACK DC HIGHER LOW DECOUPLING FREQUENCY CUTOFF C3 10µF MUTE TIME LARGER MUTE SMALLER MUTE CONSTANT ON/OFF TIME ON/OFF TIME C4 10µF ST-BY TIME LARGER ST-BY SMALLER ST-BY CONSTANT ON/OFF TIME ON/OFF TIME; POP NOISE C5 22µFXN (***) BOOTSTRAPPING SIGNAL DEGRADATION AT LOW FREQUENCY C6, C8 1000µF SUPPLY VOLTAGE BYPASS C7, C9 0.1µF SUPPLY VOLTAGE DANGER OF BYPASS OSCILLATION (*) R1 = R3 for pop optimization (**) Closed Loop Gain has to be ≥ 26dB (***) Multiplay this value for the number of modular part connected Slave function: pin 4 (Ref to pin 8 -VS) Note: If in the application, the speakers are connected via long wires, it is a good rule to add between MASTER the output and GND, a Boucherot Cell, in order to -VS +3V avoid dangerous spurious oscillations when the speakers terminal are shorted. UNDEFINED The suggested Boucherot Resistor is 3.9Ω/2W -VS +1V and the capacitor is 1µF. SLAVE -VS D98AU821 5/13
  • 6. TDA7293 INTRODUCTION frequency response; moreover, an accurate con- trol of quiescent current is required. In consumer electronics, an increasing demand has arisen for very high power monolithic audio A local linearizing feedback, provided by differen- amplifiers able to match, with a low cost, the per- tial amplifier A, is used to fullfil the above require- formance obtained from the best discrete de- ments, allowing a simple and effective quiescent signs. current setting. The task of realizing this linear integrated circuit Proper biasing of the power output transistors in conventional bipolar technology is made ex- alone is however not enough to guarantee the ab- tremely difficult by the occurence of 2nd break- sence of crossover distortion. down phoenomenon. It limits the safe operating While a linearization of the DC transfer charac- area (SOA) of the power devices, and, as a con- teristic of the stage is obtained, the dynamic be- sequence, the maximum attainable output power, haviour of the system must be taken into account. especially in presence of highly reactive loads. A significant aid in keeping the distortion contrib- Moreover, full exploitation of the SOA translates uted by the final stage as low as possible is pro- into a substantial increase in circuit and layout vided by the compensation scheme, which ex- complexity due to the need of sophisticated pro- ploits the direct connection of the Miller capacitor tection circuits. at the amplifier’s output to introduce a local AC To overcome these substantial drawbacks, the feedback path enclosing the output stage itself. use of power MOS devices, which are immune from secondary breakdown is highly desirable. 2) Protections The device described has therefore been devel- In designing a power IC, particular attention must oped in a mixed bipolar-MOS high voltage tech- be reserved to the circuits devoted to protection nology called BCDII 100/120. of the device from short circuit or overload condi- tions. 1) Output Stage Due to the absence of the 2nd breakdown phe- The main design task in developping a power op- nomenon, the SOA of the power DMOS transis- erational amplifier, independently of the technol- tors is delimited only by a maximum dissipation ogy used, is that of realization of the output stage. curve dependent on the duration of the applied stimulus. The solution shown as a principle shematic by Fig3 represents the DMOS unity - gain output In order to fully exploit the capabilities of the buffer of the TDA7293. power transistors, the protection scheme imple- mented in this device combines a conventional This large-signal, high-power buffer must be ca- SOA protection circuit with a novel local tempera- pable of handling extremely high current and volt- ture sensing technique which ” dynamically” con- age levels while maintaining acceptably low har- trols the maximum dissipation. monic distortion and good behaviour over Figure 3: Principle Schematic of a DMOS unity-gain buffer. 6/13
  • 7. TDA7293 Figure 4: Turn ON/OFF Suggested Sequence +Vs (V) +40 -40 -Vs VIN (mV) VST-BY PIN #9 5V (V) VMUTE 5V PIN #10 (V) IQ (mA) VOUT (V) OFF ST-BY PLAY ST-BY OFF MUTE MUTE D98AU817 In addition to the overload protection described mute functions, independently driven by two above, the device features a thermal shutdown CMOS logic compatible input pins. circuit which initially puts the device into a muting The circuits dedicated to the switching on and off state (@ Tj = 150 oC) and then into stand-by (@ of the amplifier have been carefully optimized to Tj = 160 oC). avoid any kind of uncontrolled audible transient at Full protection against electrostatic discharges on the output. every pin is included. The sequence that we recommend during the ON/OFF transients is shown by Figure 4. Figure 5: Single Signal ST-BY/MUTE Control The application of figure 5 shows the possibility of Circuit using only one command for both st-by and mute functions. On both the pins, the maximum appli- cable range corresponds to the operating supply voltage. MUTE STBY MUTE/ 20K ST-BY APPLICATION INFORMATION 10K 30K HIGH-EFFICIENCY 10µF 10µF Constraints of implementing high power solutions 1N4148 are the power dissipation and the size of the D93AU014 power supply. These are both due to the low effi- ciency of conventional AB class amplifier ap- proaches. Here below (figure 6) is described a circuit pro- posal for a high efficiency amplifier which can be 3) Other Features adopted for both HI-FI and CAR-RADIO applica- The device is provided with both stand-by and tions. 7/13
  • 8. TDA7293 The TDA7293 is a monolithic MOS power ampli- The main advantages offered by this solution are: fier which can be operated at 100V supply voltage - High power performances with limited supply (120V with no signal applied) while delivering out- voltage level. put currents up to ±6.5 A. This allows the use of this device as a very high - Considerably high output power even with high power amplifier (up to 180W as peak power with load values (i.e. 16 Ohm). T.H.D.=10 % and Rl = 4 Ohm); the only drawback With Rl= 8 Ohm, Vs = ±25V the maximum output is the power dissipation, hardly manageable in power obtainable is 150 W, while with Rl=16 the above power range. Ohm, Vs = ±40V the maximum Pout is 200 W. The typical junction-to-case thermal resistance of the TDA7293 is 1 oC/W (max= 1.5 oC/W). To avoid that, in worst case conditions, the chip tem- APPLICATION NOTE: (ref. fig. 7) perature exceedes 150 oC, the thermal resistance of the heatsink must be 0.038 oC/W (@ max am- Modular Application (more Devices in Parallel) bient temperature of 50 oC). The use of the modular application lets very high As the above value is pratically unreachable; a power be delivered to very low impedance loads. high efficiency system is needed in those cases The modular application implies one device to act where the continuous RMS output power is higher as a master and the others as slaves. than 50-60 W. The slave power stages are driven by the master The TDA7293 was designed to work also in device and work in parallel all together, while the higher efficiency way. input and the gain stages of the slave device are For this reason there are four power supply pins: disabled, the figure below shows the connections two intended for the signal part and two for the required to configure two devices to work to- power part. gether. T1 and T2 are two power transistors that only operate when the output power reaches a certain threshold (e.g. 20 W). If the output power in- The master chip connections are the same as creases, these transistors are switched on during the normal single ones. the portion of the signal where more output volt- The outputs can be connected together with- age swing is needed, thus ”bootstrapping” the out the need of any ballast resistance. power supply pins (#13 and #15). The slave SGND pin must be tied to the nega- The current generators formed by T4, T7, zener tive supply. diodes Z1, Z2 and resistors R7,R8 define the The slave ST-BY pin must be connected to minimum drop across the power MOS transistors ST-BY pin. of the TDA7293. L1, L2, L3 and the snubbers C9, R1 and C10, R2 stabilize the loops formed by the The bootstrap lines must be connected to- ”bootstrap” circuits and the output stage of the gether and the bootstrap capacitor must be in- TDA7293. creased: for N devices the boostrap capacitor must be 22µF times N. By considering again a maximum average output power (music signal) of 20W, in case The slave Mute and IN-pins must be grounded. of the high efficiency application, the thermal resistance value needed from the heatsink is THE BOOTSTRAP CAPACITOR o 2.2 C/W (Vs =±50 V and Rl= 8 Ohm). For compatibility purpose with the previous de- All components (TDA7293 and power transis- vices of the family, the boostrap capacitor can be tors T1 and T2) can be placed on a 1.5oC/W connected both between the bootstrap pin (6) and heatsink, with the power darlingtons electrically the output pin (14) or between the boostrap pin insulated from the heatsink. (6) and the bootstrap loader pin (12). Since the total power dissipation is less than that When the bootcap is connected between pin 6 of a usual class AB amplifier, additional cost sav- and 14, the maximum supply voltage in presence ings can be obtained while optimizing the power of output signal is limited to 100V, due the boot- supply, even with a high heatsink . strap capacitor overvoltage. When the bootcap is connected between pins 6 BRIDGE APPLICATION and 12 the maximum supply voltage extend to the full voltage that the technology can stand: 120V. Another application suggestion is the BRIDGE configuration, where two TDA7293 are used. This is accomplished by the clamp introduced at In this application, the value of the load must not the bootstrap loader pin (12): this pin follows the be lower than 8 Ohm for dissipation and current output voltage up to 100V and remains clamped capability reasons. at 100V for higher output voltages. This feature A suitable field of application includes HI-FI/TV lets the output voltage swing up to a gate-source subwoofers realizations. voltage from the positive supply (VS -3 to 6V) 8/13
  • 9. TDA7293 Figure 6: High Efficiency Application Circuit +50V T3 D6 BC394 R4 R5 T1 1N4001 BDX53A 270 270 D1 BYW98100 T4 T5 +25V BC393 BC393 R17 270 L1 1µH D3 1N4148 R6 20K C12 330nF Z1 3.9V 7 13 R20 C1 C3 C5 C7 C9 IN 3 C11 22µF 20K 1000µF 100nF 1000µF 100nF 330nF R3 680 R12 2 R7 C16 63V 35V R22 R1 13K 3.3K 1.8nF R16 L3 5µH 10K 2 4 13K TDA7293 OUT PLAY C13 10µF 14 GND R18 270 9 6 ST-BY R13 20K C15 P ot 22µF R8 C17 R23 R2 R14 30K 1 3.3K 1.8nF 10K 2 D5 12 1N4148 R15 10K R21 C2 C4 C6 C8 C10 10 8 15 20K 1000µF 100nF 1000µF 100nF 330nF Z2 3.9V C14 63V 35V 10µF L2 1µH D4 1N4148 T7 T8 D2 BYW98100 BC394 BC394 R19 270 -25V T2 R9 R10 R11 D7 BDX54A 1N4001 T6 270 270 20K BC393 -50V D97AU807C Figure 6a: PCB and Component Layout of the fig. 6 9/13
  • 10. TDA7293 Figure 6b: PCB - Solder Side of the fig. 6. Figure 7: Modular Application Circuit C7 100nF +Vs C6 1000µF R3 22K MASTER BUFFER +Vs DRIVER +PWVs C2 R2 7 11 13 22µF 680Ω IN- 2 - 14 OUT C1 470nF IN+ 3 C10 + 100nF BOOT R1 22K 12 LOADER R7 2Ω SGND 4 C5 47µF VMUTE R5 10K MUTE 10 6 MUTE BOOTSTRAP THERMAL S/C 5 VSTBY STBY 9 CLIP DET STBY SHUTDOWN PROTECTION R4 22K 1 8 15 STBY-GND -Vs -PWVs C4 10µF C9 100nF C8 1000µF C3 10µF -Vs +Vs C7 100nF C6 1000µF BUFFER +Vs DRIVER +PWVs 7 11 13 IN- 2 - 14 OUT IN+ 3 + BOOT SLAVE 12 LOADER SGND 4 MUTE 10 6 MUTE BOOTSTRAP 9 THERMAL S/C 5 STBY STBY SHUTDOWN PROTECTION 1 8 15 STBY-GND -Vs -PWVs C9 100nF C8 1000µF D97AU808C -Vs 10/13
  • 11. TDA7293 Figure 8a: Modular Application P.C. Board and Component Layout (scale 1:1) (Component SIDE) Figure 8b: Modular Application P.C. Board and Component Layout (scale 1:1) (Solder SIDE) 11/13
  • 12. TDA7293 mm inch DIM. MIN. TYP. MAX. MIN. TYP. MAX. OUTLINE AND A 5 0.197 MECHANICAL DATA B 2.65 0.104 C 1.6 0.063 D 1 0.039 E 0.49 0.55 0.019 0.022 F 0.66 0.75 0.026 0.030 G 1.02 1.27 1.52 0.040 0.050 0.060 G1 17.53 17.78 18.03 0.690 0.700 0.710 H1 19.6 0.772 H2 20.2 0.795 L 21.9 22.2 22.5 0.862 0.874 0.886 L1 21.7 22.1 22.5 0.854 0.870 0.886 L2 17.65 18.1 0.695 0.713 L3 17.25 17.5 17.75 0.679 0.689 0.699 L4 10.3 10.7 10.9 0.406 0.421 0.429 L7 2.65 2.9 0.104 0.114 M 4.25 4.55 4.85 0.167 0.179 0.191 M1 4.63 5.08 5.53 0.182 0.200 0.218 S 1.9 2.6 0.075 0.102 S1 1.9 2.6 0.075 0.102 Multiwatt15 V Dia1 3.65 3.85 0.144 0.152 12/13
  • 13. TDA7293 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publicationsupersedes and replaces all information previously supplied. STMicroelectronics products are notauthorizedfor use as critical components in life support devices or systems without express writtenapproval of STMicroelectronics. The ST logois a registered trademark of STMicroelectronics © 1999 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 13/13
  • 14. This datasheet has been download from: www.datasheetcatalog.com Datasheets for electronics components.