This document discusses the design, prototyping, and testing of power electronics systems using National Instruments tools and platforms. It provides an overview of typical power electronics applications and describes the NI tool chain for designing, prototyping, and testing power electronics controls including LabVIEW design software, CompactRIO and Single-Board RIO embedded platforms, and IP libraries. Key benefits highlighted include reducing costs and risks while focusing on core competencies rather than low-level hardware and software design.
1. Design, Prototyping and Test of Power
Electronics
i R L
PWM +
+ +
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Vsup vm
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id
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Javier Gutierrez
Business Development Manager
2. Typical Application
Ba?ery
Stack,
Solar
Array
DC
Management
DC
System
Transformer
Converter/Rec<fier
Inverter/Drive
AC
DC
GRID
DC
AC
Control
Systems
Power
System
Inverter/Converter/Drive
Motor/Generator
3. NI Power Electronics Tool Chain
Test
Design
Cells
HIL
Prototype
Testing
Deploy
NI sbRIO-9606
NI GPIC
Mezzanine Card
DC+ VA (AC)
DC
VB (AC)
M/G
POWER M/G
BUS
DC- VC (AC)
Energy Source Power Inverter Output Filter Stage 3-Phase AC System
4. Business Benefits
Reduce your engineering cost, risk and
Profitability
development time
Focus on your core competency and value
Product differentiation
(not DSP board design)
Incorporate the latest technologies while
On-time delivery
reusing software investments
Ship fully tested, supported commercial Product quality
embedded systems
Empower your control experts to do Development efficiency
embedded development
5. Technical Benefits
• LabVIEW development tool chain
– Deployment-ready commercial embedded system for high-
volume grid-tied inverter and motor/generator drive applications
– High level graphical system design platform enables rapid
development of differentiated, high performance products
– Complete, industry proven LabVIEW tool chain and drivers for
real-time OS, reconfigurable FPGA, and inverter control I/O
board
– Available IP block libraries, reference design examples and
integration with common simulation environments
• FPGA-based control system
– FPGA-based system for silicon level reconfigurability, lifetime
field upgradability, IP protection and true parallel execution in
dedicated hardware with 25 nanosecond timing resolution
– Xilinx Spartan-6 LX45 FPGA with 22.6 GMACs DSP LabVIEW FPGA graphical development*
performance for advanced control, custom PWM, protection
interlocks, inter-board communication protocols, GPS
timestamping, …
* NI Power Electronics Library included with NI
SoftMotion Module 2011 f1 or higher
6. Technical Benefits
• Measurement and signal processing capabilities
– DMA data scope capabilities for high speed waveform capture
and transient event recording of physical I/O and internal
register signals
– Real-time power analysis and transient event recording
– 400 MHz PowerPC processor with VxWorks OS for hard real-
time multi-threaded floating point signal processing, networking,
data logging, …
• Flexibility
– Expandable for synchronized control of large, multilevel
inverters
– Software-defined device– install once, upgrade remotely
– Smart grid utility communication protocol support (DNP3, IEC
60870, IEC 61850, Modbus, …), remote client dashboards,
SCADA systems and remote firmware upgrade tools LabVIEW Real-Time graphical user interface
– Options for depopulation, current AI, 16-bit calibrated AI, real-
time clock battery, conformal coating, top/bottom/right-angle
connectors
7. NI Embedded Control & Monitoring Platform
Suppor/ng
Products
&
Services
IP
for
control,
Vision
Analysis,
comm,
…
RIO
Pla(orm
LabVIEW
LabVIEW Real-Time
LabVIEW FPGA Alliance
&
Mo<on
Design
Partners
I/O
Proc. FPGA I/O
I/O
Industrial
buses,
Services
and
communica<on
Training
3rd-‐Party
HMIs
Products
WSN
8. NI RIO Technology
Application IP
LabVIEW
Middleware
Signal
Processing
IP
Driver
APIs
LabVIEW
Real-‐Time
Control
IP
Device
Drivers
Third-‐Party
IP
LabVIEW
FPGA I/O
Drivers
I/O
I/O
Processor
FPGA
I/O
Custom
I/O
CompactRIO
&
Single-‐Board
RIO
PXI,PC
RIO
(R
Series,
FlexRIO)
Value
Value
Ultra
Rugged
Performance
High
Performance
11. LabVIEW Tools for Signal Processing, Analysis, and Control
Advanced Signal Digital Filter Design Control Design and
Processing Simulation Module
• Wavelets • FIR/IIR filter design/analysis, • Model construction, conversion,
• Time-series analysis quantization and reduction
• Time and frequency response
(independent component • Fixed-point modeling, fixed-point • Dynamic characteristics
analysis, principal component simulation, code generation • Classical control design
analysis, model-based spectral (FPGA /ANSI C), … • root locus, PID, lead/lag ...
analysis, … ) • State-space control/estimation
• Time-frequency analysis (Gabor, • LQR, LQG, pole placement,
STFT, … ) Kalman filter ...
11
12. LabVIEW FPGA Power Electronics IP
FPGA-to-FPGA Output
Motion
Communication, CORDIC Trig
Trajectory
Synchronization Functions Space Vector
Splining
PWM
JMAG RT State
Space H-Bridge Multichannel
Simulator Digital Logic
Logic PID
Fixed Point Signal
Generators Protection Loop
Math Interlocks Structures
Signal Processing Hall
1,3-Phase I/F DMA Data
Control
FFT, Resampling, PLL Streaming
Zero Crossing
Encoder
Digital Voltage, I/F Matrix*Vector
Filters DC, RMS, Period Current Multiply
Measurements Triggers
Look Up Park, Clarke
IEC Power Quality, Table Transforms
Phasor Measurements
Input
ni.com/ipnet
13. NI Power Electronics IP Library*
• New officially supported IP blocks for power electronics control, including Trapezoidal and Space
Vector commutation for three phase inverters and PMSM/BLDC motor/generators!
Typical Field Oriented Control Architecture for PMSM Motor/Generator
* Included with NI SoftMotion Module 2011 f1 or higher
14. NI Power Electronics IP Library
• Complete reference design examples for Field
Oriented (Space Vector) and Trapezoidal
Commutation
• Plug and play support for the
NI 9502 BLDC/PMSM drive module and
AKM brushless servo motors.
17. NI
CompactRIO
FPGA-‐based
Pla(orm
Environmental
•
-‐40
to
70
°C
temperature
range
•
50g
shock,
5g
vibra<on
Real-Time
Low
Power
Consump/on
FPGA
Processor •
9
to
35
VDC
power,
7-‐10
W
typical
•
Reconfigurable
FPGA
for
high-‐speed
and
custom
I/O
<ming,
triggering,
and
control
•
I/O
modules
with
built-‐in
signal
condi<oning
for
connec<on
to
sensors/actuators
•
Real-‐/me
processor
for
reliable
measurement,
analysis,
connec<vity,
and
control
18. NI
Single-‐Board
RIO
Embedded
Control
&
Acquisi/on
Real-Time Processor
Networking/Peripherals 400 MHz processor for floating-point control,
10/100 Ethernet port analysis, and logging
RS232 Serial port
Reconfigurable FPGA
Customized timing and processing of I/O
LabVIEW
• Graphical software for rapid
development
• Program processor, FPGA and I/
Small Size, Low Power
O with one tool 21 x 9 cm. (8.2 x 3.7 in.)
• Integrate existing C/VHDL 19-30 VDC power, (7-10 W typ.)
Expansion I/O
Connect up to three C Series modules for
additional I/O (strain, TC, comm., motion, etc…)
Onboard Analog and Digital I/O
110 DIO, Up to 32-ch AI, up to 4-ch AO,
Up to 32-ch of 24 V DIO
19. LabVIEW FPGA vs VHDL
66 Pages ~4000 lines
Counter Analog I/O Streaming
20. NI
RIO
Hardware
Plaaorm
CompactRIO
&
Single-‐Board
RIO
PXI/PC
RIO
Value
Value
Ultra
Rugged
Performance
High
Performance
Processor
Performance
Up
to
400MHz
Up
to
800
MHz
Up
to
1.33
GHz
Dual-‐Core
Up
to
2.26
GHz
Quad-‐Core
Up
to
43,661
logic
cells,
Up
to
110,592
logic
cells,
Up
to
147,443
logic
cells,
Up
to
94,208
logic
cells,
FPGA
Performance
up
to
58
mul<pliers
up
to
64
mul<pliers
up
to
180
mul<pliers
up
to
640
mul<pliers
Analog
I/O
Speed
Up
to
1
MS/s
Up
to
1
MS/s
Up
to
1
MS/s
Up
to
250
MS/s
Opera<ng
System
Real-‐Time
OS
Real-‐Time
OS
Window/Real-‐Time
OS
Windows/Real-‐Time
OS
-‐20
to
55°
C*,
-‐40
to
70°
C,
0
to
55°
C,
0
to
55°
C,
Ruggedness
passively
cooled
passively
cooled
passively
cooled
ac<vely
cooled
Size
Starts
at
17.8x9.3x8.7
cm.3*
Starts
at
18x9.3x8.7cm.3
Starts
at
40.4x13.4x8.7
cm.3
Starts
at
25.7x21.4x18.4
cm.3
• In-‐vehicle
logging
• Smart
grid
analyzer
• Machine
Condi<on
• Machine
Vision
• Hardware-‐in-‐the-‐Loop
(HIL)
• Environmental
Monitoring
Monitoring
• Power
Distribu<on/Control
Test
• Mobile
robo<cs
• Industrial
Machine
• ECU
Prototyping
• Medical
Imaging
• Medical
diagnos<cs
&
Target
Applica<on
Control
• Analy<cal
Instruments
• High-‐end
Simula<on
device
control
Examples
• Special
Purpose
Machines
• Oil
&
Gas
Monitoring
• Turbine
Control
• Protocol
Aware
Test
• Power
Monitoring
• Industrial
Robo<cs
• Wireless
Test
(SPM)
• Structural
Monitoring
• Rapid
Control
Prototyping
• Soiware
Defined
Radio
• Chemical
Process
Control
• Automated
Welding
• Big
physics
&
research
• Signal
Intelligence
• Mo<on
control
Control
*Single-‐Board
RIO
versions
are
available
that
operate
from
-‐40
to
85°
C
and
start
at
10.3x9.7x2.4
cm3
21. High-Performance Multicore CompactRIO
Dual-Core 1.33GHz 2GB DDR3
Processor RAM
Spartan-6 CPU Expansion
USB & Serial 32GB cFast LX150 FPGA Module
Connectivity Storage
VGA Gigabit
Graphics Ethernet 8 Slots of C
MXI-Express for C Series IO
Series Expansion Specifications for cRIO-9082
21
22. Rapid Control Prototyping (RCP)
• Recommended Software
§ NI Power Electronics IP Library
(included with NI SoftMotion 2011 f1)
§ NI Power Measurement Suite
(pioneer program)
§ NI MultiSim (co-simulation pioneer
program)
High-Performance Multicore CompactRIO
§ NI Veristand (for control prototyping
and real-time HIL simulation)
§ NI Simulation Interface Toolkit
22
24. Field Oriented Motor Control: Selex-Galileo
• Field-Orientated Control of a Three-Phase
Brushless Permanent Magnet Motor
§ Rapid development of next generation motor control
systems
§ Increases peak power to squeeze extra performance
from existing motors
§ As FPGAs increase in capacity, the role evolves from
motor control to full servo system control
• Key Enabling Technologies
§ NI LabVIEW FPGA, NI PXI Reconfigurable I/O
hardware
“Using the NI PXI-7831R FPGA, we have demonstrated a new technology to
our customer with minimal time and equipment investment.“
- Brian Mann, Selex-Galileo (formerly BAE) case study
24
26. NI Single-Board RIO General Purpose Inverter Controller (GPIC)
CONTROL SYSTEM
DC+ VA (AC)
DC
VB (AC)
M/G
POWER M/G
BUS
DC- VC (AC)
Energy Source Power Inverter Output Filter Stage 3-Phase AC System
27. NI
Single-‐Board
RIO
960x
LabVIEW Tool Chain Reconfigurable FPGA
Silicon level reconfigurability, lifetime upgradability,
• Rapid commercialization of true parallel execution in dedicated hardware
differentiated, high performance
products RIO Mezzanine Connector (RMC)
• Complete, industry proven High density, high bandwidth connector gives
graphical system design tools direct access to FPGA and processor I/O
• Available IP block libraries and
reference design examples
• Fully integrated support for Real-Time Processor
processor, FPGA , I/O and 400 MHz PowerPC for floating-point control,
analysis, logging and network communication
networking in single language
• Integrate existing C, VHDL,
3.8”
simulation or text-based math
code
Networking Peripherals
Ethernet, RS-232, CAN, USB 4”
Modbus, DNP3, HTTPS and SSL support
Small Size, Low Power
10.3 x 9.6 cm (4 x 3.8 in.)
9-30 VDC power
ni.com/singleboard
28. Top Mount Connectors
Mechanical Design 7.080
[179.83]
• Sturdy 100-mil header connectors with
high retention force (non-latching) 4.700
[119.38]
• Support for bottom, top and right-angle
connector orientations
• Mating board options:
1.747
– Ribbon cable to gate drive board GPIC Mezzanine Card sbRIO-9606 [44.37]
– Connector interface PCB with custom
cable harness
– Signal conditioning PCB with custom
HS DO Expansion I/O
cable harness
– Fiber optic interface PCB
GP DO SS AI
– Directly mate to gate drive board GP AI, AO
Contactor DO
GP DI ENET, RS-232, CAN, USB
29. Typical Stack
1. NI Single-Board RIO sbRIO-9606
2. NI GPIC RIO Mezzanine Card (bottom orientation connectors)
3. Custom Connector I/F PCB (not provided by NI)
To SEMIKRON To Application
SKiiP 3 Specific I/O
30. Mechanical Design Bottom Mount Connectors
7.080
[179.83]
High Speed Digital Output • 12-ch HS DO (18-pins, 6 GND)
(Gate Drive) • 1 VPWR_IN (1-pin)
(20-pin 100 mil header) • 1-pin reserved
General Purpose and • 24-ch GP DO (28-pins, 4 GND) 4.700
Contactor Digital Output • 4-ch Contactor DO (8-pins, 4 [119.38]
(40-pin 100 mil header) GND)
• 4-pins reserved
FPGA and Processor • 16-ch +3.3 V FPGA IO (24-pins,
Expansion I/O 8 GND)
(50-pin 100 mil header) • +3.3 V FPGAPWR_IN (1-pin) 1.747
• +5 V SYSPWR_OUT (1-pin) GPIC Mezzanine Card sbRIO-9606 [44.37]
• 24-pins reserved
General Purpose Digital • 24-ch GP DI (26-pins, 2
Input VPWR_IN)
(26-pin 100 mil header)
High Speed Simultaneous • 16-ch Differential SS AI (32 Expansion I/O
AI, General Purpose pins) HS DO
Scanned AI , General • 8-ch Scanned GP AI (9-pins,1
Purpose AO COM)
SS AI
(60-pin 100 mil header) • 8-ch GP AO (9-pins, 1 COM) GP DO GP AI, AO
• 10-pins reserved Contactor DO
GP DI ENET, RS-232, CAN, USB
31. Typical Configuration
SB-‐RIO
9606 Enet Other
systems
MPC5125
Processor HMI
RS-‐232
CAN
Spartan
6 CAN Ba?ery
FPGA or
Vehicle
USB
9-‐30
V
Inverter
Controller
RMC
Gate
Drive
Digital
I/O Analog
I/O
Expansion
I/O
High
Speed
24
sourcing
DI 16
Ch.
±10V
SS
AI
16
Ch.
3.3
V
DIO
12
ch.
DO 24
sinking
DO
8
Ch.
0-‐5
V
Mux
AI
Ext.
PS Ext.
PS 4
ch.
relay
DO 8
Ch.
0-‐5
V
AO
5-‐24
V 5-‐24
V
Driver Addi<onal
I/O:
U Current
Sensors
Voltage
Sensors
DC
In Semikron V AC
Out Temperature
Sensors
SKiiP Status
Signals
or
SKAII Control
Signals
W
32. Software Hierarchy Elements
Remote Client Dashboard
Live Trend, Log File Settings Firmware HMI Utility
Waveform Meter Viewer Config. Update Panel SCADA
Real-Time Processor TCP, HTTPS RS-232 DNP3
Supervisory Power Event Dashboard Health HMI SCADA
Logic Analysis Record Comm. Monitor Comm. Comm.
Field Programmable Gate Array PCI, DMA
Sensor Clarke, Space
DMA Data Protection PID Control Pulse Width
Decoding, Park Vector
Scope Interlocks Loops Modulation
Filtering Transforms Modulation
GPIC Mezzanine Card RMC
Raw FPGA Scanned Simultaneous, General Contactor General High
& uP I/O AI, AO Differential AI Purpose DI Relay DO Purpose DO Speed DO
FPGA-FPGA Temperature, Phase I/V, IGBT Error, AC, DC, Pilot Relays,
Gate Drivers,
Comm & Synch, Monitoring, DC I/V, Contactor Aux, Precharge Faults, Fans,
Fiber TX
GPS, Fiber I/F Debugging Commands E-Stop, Sensors Contactors Resets, LEDs
33. Intelligent grid
Advanced RTUs, Smart Distribution Switches
• Houston field tests early in 2010
– Advanced analytics for distribution automation
– Development and introduction of advanced switching
features
– Embedded electrical power measurements and monitoring
– Wireless communication for configuration and file transfer
– Remote updates, configuration and firmware upgrades
Distribution Switch Analytics (NI Smart Grid Analyzer)
• Rated Through 38kV • 833 Samples/Cycle, 24-bit Resolution
• Vacuum Interruption Technology • Advanced Embedded Analytics
• Integrated CTs & Voltage Sensors • Data Storage, 1000+ event captures
• Remote upgrade
• Multi Protocol Communications
35. NI power electronics HIL investments
Real-Time Power Simulation Ba?ery
Stack,
(Cracked ECU or Full Power Simulator) Solar
Array
DC
Management
DC
System
Transformer
Converter/Rec<fier
Inverter/Drive
AC
DC
GRID
DC
AC
Physical Control Board Control
System
Power
System
Inverter/Converter/Drive
Motor/Generator
36. Electric Motor HIL Simulation
• Benefits same as any HIL
§ Early functional tests
§ Test under any situation at no-risk (e.g. failure)
§ Reproducible and automated test
• Differences
§ High Speed Dynamics
• Extremely high sampling frequency (1 µsec)
• Special requirements for capturing digital signals
§ Power Electronics
• Requires special interfacing
• ECUs provide actuation power
37. Electric Motor HIL Interfaces
• Three types
§ Signal Level
• Cracked ECU or separate power electronics stage
• 6-7 Gate Drive Signals
• 2-3 current values
• Rotor position (Hall/Encoder/Resolver)
§ Power Level
• Power electronics
§ Mechanical Level
• Mechanical set-up with load motors
38. Signal Level HIL
• Advantages
§ No real power application
• Low cost
• Safe
• Can test any motor parameters -> 2 kW to 400 kW
§ Full access to model
• Can model all physical effects
§ Mechanical
§ Power Electronics
• Same model for offline/on-line simulation
• Disadvantages
§ Typically ECUs will need to be cracked
§ Testing of power stage not possible
39. Motor Simulation
Why so fast?
§ Switching frequencies are on the order of 20 KHz
(Necessary for smooth winding currents)
§ Switching frequencies may vary with time
§ Sampling frequency 10x (~5 µsec)
Simulation now quasi-continuous
Better stability
High computational demand requires FPGA
40. Real-time power simulation challenges & solutions
• Simulation of discontinuous switch mode power systems with active and passive
switching components
– Use piecewise state-space models with coefficients stored in FPGA RAM
• Very high speed discrete real-time simulations
– Use first order state-space format for numerical stability
• Fixed point math
– Use parallel connections when possible- avoid higher order blocks connected in series
– Create a test bench simulation to validate fixed point math before compiling to FPGA
• Nonlinear models
– Use non-linear differential equations or look-up tables based on FEA
• Stiff system (combined high and low bandwidth components)
– Use parallel loops, filter the lower speed signals when passing to the faster loops
45. HIL Testing of Wind Turbine Control System Software
“The
modular
architecture
allows
us
to
scale-‐up
the
system
to
meet
the
growing
requirements
of
rapidly
evolving
wind
energy
technology.”
–
Samir
Bico,
Siemens
Wind
Power
A/S
46. A New Era: Inverter Real-Time Virtual Prototype
System Parameters
IGBTs: SEMIKRON SKM 50 GB 123D, 600 V, 80 A
DC – link voltage: Vdc = 400 V
Fundamental Freq = 60 Hz
PWM (carrier) Freq = 3 KHz
Output Filter: Lf = 800 µH Cf = 500 µF
Load: Lload = 2 mH Rload = 5 Ω
Simulation loop rate of 3.57 MHz
> 3000X Acceleration
47. Development of State-Space Model
Apply Kirchoff’s current and voltage laws
Final equation set scaled for more
accurate FXP handling
I = iI0
V=vV0
48. Partners – JMAG to LV FPGA Integration
JMAG-RT model
JMAG FEA
• RTT file; look-up table
• Binary
Converter
IL • Reads RTT file
NI H
• DLL
Ld(Id,Iq), Lq(Id,Iq)
• For NI’s motor model
49. Creating High Fidelity Models
NI VeriStand Real-
Time Test
Software
Windows PC LabVIEW Real-Time LabVIEW FPGA
50. PXI
Pla(orm
–
Rugged,
Industrial
R
Series
Modular
NI
Intel
PXI
Express
Timing,
Triggering
PXI
DAQ
Instruments:
Quad
core
CPU
Bus
&Synchroniza<on
5M
Gate
FPGA
Digi<zer,
DMM
Windows
and/or
RT
OS
LabVIEW
Sound
and
Vibra<on
Toolkit,
Vision
Module
…
NI-‐DAQmx,
NI-‐Scope…
51. NI
FlexRIO
–
Speed
and
Flexibility
FlexRIO
Adapter
Module
FlexRIO
FPGA
Module
-‐
PXI
&
PXIe
•
Interchangeable
I/O
•
Up
to
132
channels
•
Customizable
by
users
•
Up
to
1
Gb/s
per
pair
•
Module
Development
Kit
•
Up
to
128
MB
of
DDR2
DRAM
52. Resource Usage and Timing of Current
Implementation (7965R)
• Total Slices: 37.9% (5585 out of 14720)
• Slice Registers: 25.6% (15070 out of 58880)
• Slice LUTs: 27.3% (16057 out of 58880)
• DSP48s: 6.2% (40 out of 640)
Inverter Calculation time: 28 ticks of 100 MHz clock
(0.5% resolution with respect to 20 kHz PWM switching frequency)
53. Key Items for HILS
Product name ・16-bit 12ch simultaneous analog ±12V input
• HKS-9609 with 50MS/s sampling rate
・16-bit 12ch ±12V simultaneous analog
output with 50MS/s update rate
・16ch digital input and 16ch digital output at
50MHz
54. HILS Configuration
Driver side
PXI as drive hardware
HKS-9609
HKS-9609 as I/O connection
HKS-9612 as motor control
Controller side
54
56. Power Level Motor Simulation
Gate signals
Phase
DSP/µC Feedback signals
Current
Control (eg; hall/encoder) Power Amp
Encoder
SET PXI/FPGA
Current feedback
VirtualComps Simulator
ECU
58. NI’s Role in Power Electronics Applications
Inverters Motor Drives
Renewable Energy Electric Vehicles
Power
Electronics
Energy Storage Control Distribution Switches
PMU
HIL Validation
Power Power Metering
Functional Test Electronics
Test Monitoring Power Analyzer
Performance
Characterization Fault Prediction
59. Questions?
i R L
PWM +
+ +
-
Vsup vm
-
id
-
Javier.gutierrez@ni.com