Palestra realizada por Luciano Palma no Intel Software Day 2013 (22/10/2013) Conheça a arquitetura do Intel Xeon Phi, um coprocessador capaz de entregar mais de 2 TFlops de processamento para sua solução de HPC (High Performance Computing).

1. Entenda de onde
vem toda a potência do
Intel® Xeon Phi™
Luciano Palma
Community Manager – Servers & HPC
Intel Software do Brasil
Luciano.Palma@intel.com

2. Por que Programação Paralela é Importante?
Pesquisa
Científica
Competitividade
na Indústria
Modelagem de
Clima/Tempo
Pesquisa Farmacêutica
Análises Financeiras
Imagens Médicas
CAD/manufatura
Exploração de Energia
Criação de Conteúdo Digital
Simulações
Projeto de novos Produtos
Segurança Nacional
Corrida Computacional
Segurança
Nacional
Desempenho Computacional
Total por país
Maiores Desafios  Maior Complexidade Computacional…
… mantendo um “orçamento energético” realista

3. A Capacidade Computacional evoluiu.
O Software não acompanhou.
A densidade de transistores continua aumentando, mas…
… o aumento da velocidade (clock) não
A grande maioria dos PCs vendidos são multi-core, mas…
… muitos programas / cargas ainda não tiram proveito
do paralelismo possível
O Processamento Paralelo é chave para obter
o máximo
desempenho
possível

4. Computação Serial vs. Paralela
Serialização




for (i=0; i< num_sites; ++i) {
search (searchphrase, website[i]);
}
Faz Sentido!
Fácil para fazer “debug”
Determinístico
No entanto…
… aplicações serializadas não maximizam o desempenho de saída
(output) e não evoluirão no tempo com o avanço das tecnologias
Paralelização – dá para fazer?!
parallel_for (i=0; i< num_sites; ++i) {
 Depende da quantidade de trabalho search (searchphrase, website[i]);
}
a realizar e da habilidade
de dividir a tarefa
 É necessário entender a entrada (input), saída (output)
e suas dependências

5. Dividindo o trabalho…
Decomposição de Tarefas:
Executa diferentes funções do
programa em paralelo.
Limitada escalabilidade, portanto
precisamos de…
Decomposição de Dados:
Dados são separados em blocos e
cada bloco é processado em uma
task diferente.
A divisão (splitting) pode ser
contínua, recursiva.
Maiores conjuntos de dados 
mais tasks
O Paralelismo cresce à medida que
o tamanho do problema cresce
#pragma omp parallel shared(data, ans1, ans2)
{
#pragma omp sections
{
#pragma omp section
ans1=do_this(data);
#pragma omp section
ans2=do_that(data);
}
}
#pragma omp parallel_for shared(data, ans1)
private(i)
for(i=0; i<N; i++) {
ans1(i) = do_this(data(i));
}
#pragma omp parallel_for shared(data, ans2)
private(i)
for(i=0; i<N; i++) {
ans2(i) = do_that(data(i));
}

6. Técnicas de Programação Paralela:
Como dividir o trabalho entre sistemas?
É possível utilizar Threads (OpenMP, TBB, Cilk, pthreads…) ou
Processos (MPI, process fork..) para programar em paralelo
Modelo de Memória Compartilhada
 Único espaço de memória utilizado por múltiplos processadores
 Espaço de endereçamento unificado
 Simples para trabalhar, mas requer cuidado para evitar condições de corrida
(“race conditions”) quando existe dependência entre eventos
Passagem de Mensagens
 Comunicação entre processos
 Pode demandar mais trabalho para implementar
 Menos “race conditions” porque as mensagens podem forçar o sincronismo
“Race conditions”
acontecem quando processos ou
threads separados modificam ou
dependem das mesmas coisas…
Isso é notavelmente difícil de
“debugar”!

7. Exemplo de uso
OpenMP – Cálculo de π

8. Cálculo de π – Teoria
π pode ser calculado através da integral abaixo
1
π = ∫ f(x) * dx = 4 / (1 + x2) * dx = 3.141592654...
0

9. Cálculo de π – Primeira Aproximação
Valor grosseiramente aproximado de π
π = 4 / (1 + 0,52) * 1 = 4 / 1,25  π = 3,2

10. Cálculo de π – Segunda Aproximação
Com mais aproximações, o valor de π tende ao valor teórico
f(0,25) = 3,735; f(0,75) = 2,572  π = 3,153
3,735 * 0,5
= 1,867
2,572 * 0,5
= 1,286

11. 2,102 * 0,1 = 0,210
2,322 * 0,1 = 0,232
2,560 * 0,1 = 0,256
2,812 * 0,1 = 0,281
3,071 * 0,1 = 0,397
3,326 * 0,1 = 0,333
3,563 * 0,1 = 0,356
3,765 * 0,1 = 0,376
3,912 * 0,1 = 0,391
3,990 * 0,1 = 0,399
Cálculo de π – Aumentando os intervalos…
Quanto mais intervalos, maior a precisão do cálculo
Aproximação com 10 intervalos  π = 3,1424

12. 3,326 * 0,1 = 0,333
3,563 * 0,1 = 0,356
2,102 * 0,1 = 0,210
2,102 * 0,1 = 0,210
PI = 3,1424
2,102 * 0,1 = 0,210
Thread
2,322 * 0,1 = 0,232
2,560 * 0,1 = 0,256
2,812 * 0,1 = 0,281
Thread
3,071 * 0,1 = 0,397
Thread
2,322 * 0,1 = 0,232
2,322 * 0,1 = 0,232
2,560 * 0,1 = 0,256
2,560 * 0,1 = 0,256
2,812 * 0,1 = 0,281
2,812 * 0,1 = 0,281
3,071 * 0,1 = 0,397
3,071 * 0,1 = 0,397
3,765 * 0,1 = 0,376
3,326 * 0,1 = 0,333
3,326 * 0,1 = 0,333
3,563 * 0,1 = 0,356
3,563 * 0,1 = 0,356
3,765 * 0,1 = 0,376
3,765 * 0,1 = 0,376
3,912 * 0,1 = 0,391
3,912 * 0,1 = 0,391
3,990 * 0,1 = 0,399
3,990 * 0,1 = 0,399
3,912 * 0,1 = 0,391
3,990 * 0,1 = 0,399
Solução do Problema com Paralelismo
Cada thread realiza o cálculo de alguns intervalos
Thread
REDUÇÃO

13. Agora um pouco de hardware…

14. Engenharia e Arquitetura…
14

15. Intel inside, inside Intel…
Um processador com múltiplos cores possui
componentes “comuns” aos cores.
Estes compontentes recebem o nome de Uncore.

16. Intel inside, inside Intel…
E agora, dentro do core…

17. MicroArquitetura Sandy Bridge
FRONT-END
BACK-END

18. Intel® Xeon Phi™
Ainda mais poder de processamento!

19. Intel® Xeon Phi™
É o coprocessador certo para mim?
http://software.intel.com/pt-br/articles/is-the-intel-xeon-phi-coprocessor-right-for-me

20. Intel® Xeon Phi™
Ainda mais poder de
processamento!
Até 61 cores (4 threads por core)
Até 16 GB RAM GDDR5
Transferência de memória até 352 GB/sec
Vetores de 512 bits
1,2 TFLOPs de processamento (Precisão Dupla)
1 slot PCIe-x16
Uso eficiente de energia (225W - 300 W)

21. Intel® Xeon Phi™
Cada placa é vista como um nó num cluster
Programação: x86

22. Intel® Xeon Phi™
Visão de Software da Arquitetura do Intel® Xeon Phi™

23. Intel® Xeon Phi™
Visão de Hardware da Arquitetura do Intel® Xeon Phi™
Um anel bidirecional de alta velocidade
interconecta as caches L2 dos cores

24. Intel® Xeon Phi™
GFLOP/sec =16 (SP SIMD Lane) x 2 (FMA) x 1.1 (GHZ) x
60 (# cores) = 2.112 (aritmética de precisão simples)
GFLOP/sec = 8 (DP SIMD Lane) x 2 (FMA) x 1.1 (GHZ) x 60
(# cores) = 1.056 (aritmética de precisão dupla)

25. Linha de Produtos Intel® Xeon Phi™
Família 3
Excelente Solução para
Computação Paralela
Liderança em Desempenho/$
Família 5
Otimizada para Ambientes
de Alta Densidade
6GB GDDR5
240GB/s
>1TF DP
3120P
5110P
5120D
7120P
7120X
8GB GDDR5
>300GB/s
>1TF DP
Liderança em Desempenho/watt
225-245W
Família 7
16GB GDDR5
Mais Alto Desempenho,
Mais Memória
Liderança em Desempenho
25
3120A
352GB/s
>1.2TF DP
Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors. Performance tests, such as SYSmark and MobileMark, are measured using specific computer systems, components,
software, operations and functions. Any change to any of those factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated purchases, including the
performance of that product when combined with other products. For more information go to http://www.intel.com/performance

26. Por que descer neste nível?
Para tirar o máximo proveito dos recursos do hardware!
Utilizar todas as “threads de hardware”
 Não esquecer o HyperThread
Utilizar todas as unidades de execução
 Retirar o máximo de instruções por ciclo de clock
Otimizar o uso dos unidades de vetores (AVX/AVX2)
 Loops otimizados
Manter as caches com dados/instruções válidos
 Evitar “cache misses”
Aproveitar o “branch prediction”
 Evitar o “stall” da pipeline

27. Por que descer neste nível?
Para tirar o máximo proveito dos recursos do hardware!
Utilizar todas as “threads de hardware”
 Não esquecer o HyperThread
Utilizar todas as unidades de execução
 Retirar o máximo de instruções por ciclo de clock
Otimizar o uso dos unidades de vetores (AVX/AVX2)
 Loops otimizados
Manter as caches com dados/instruções válidos
 Evitar “cache misses”
Aproveitar o “branch prediction”
 Evitar o “stall” da pipeline

28. Por que descer neste nível?
Para tirar o máximo proveito dos recursos do hardware!
Utilizar todas as “threads de hardware”
 Não esquecer o HyperThread
Utilizar todas as unidades de execução
 Retirar o máximo de instruções por ciclo de clock
Otimizar o uso dos unidades de vetores (AVX/AVX2)
 Loops otimizados
Manter as caches com dados/instruções válidos
 Evitar “cache misses”
Aproveitar o “branch prediction”
 Evitar o “stall” da pipeline

29. Existem recursos para lhe ajudar!
Ferramentas de Software da Intel
http://software.intel.com
IDZ – Intel Developer Zone

30. Modelos de Programação Paralela
Intel® Cilk™ Plus
Intel® Threading
Building Blocks
• Extensões para
as linguagens
C/C++ para
simplificar o
paralelismo
• Template
libraries
amplamente
usadas em C++
para paralelismo
• Código aberto
Também um
produto Intel
Domain Specific
Libraries
• Intel® Integrated
Performance
Primitives
• Intel® Math
Kernel Library
Padrões
estabelecidos
• Message Passing
Interface (MPI)
• OpenMP*
• Coarray Fortran
• OpenCL*
• Código aberto
Também um
produto Intel
Níveis de abstração conforme a necessidade
Mesmos modelos para multi-core (Xeon) e
many-core (Xeon Phi)

31. Nota sobre Otimização

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